Hardware node with position-dependent memories for neural network processing

A processor comprising:

• a pipeline configured to process instructions, the pipeline including a matrix vector unit, a first multifunction unit, wherein the first multifunction unit is connected to receive an input from the matrix vector unit, a second multifunction unit, wherein the second multifunction unit is connected to receive an output from the first multifunction unit, and a third multifunction unit, wherein the third multifunction unit is connected to receive an output from the second multifunction unit;
• and
• a decoder configured to decode a chain of instructions received via an input queue, wherein the chain of instructions comprises a first instruction that can only be processed by the matrix vector unit and a sequence of instructions that can only be processed by a multifunction unit;
• and
• a controller configured to map the first instruction for processing using the matrix vector unit and map each of instructions in the sequence of instructions for processing depending upon a position of the each of instructions in the sequence of instructions, such that an instruction that is in a first position in the sequence of instructions is processed by the first multifunction unit, an instruction that is in a second position in the sequence of instructions is processed by the second multifunction unit, and an instruction that is in a third position in the sequence of instructions is processed by the third multifunction unit.

A system comprising:

• an input message processor configured to process incoming messages, wherein the input message processor is further configured to split the incoming messages into a first set of messages and a second set of messages;
• a scalar processor configured to process the first set of messages and not the second set of messages;
• a neural function unit configured to process instructions placed in a plurality of queues by the scalar processor on input data received at least via the second set of messages, the neural function unit comprising:
• a pipeline configured to process instructions, the pipeline including a matrix vector unit, a first multifunction unit, wherein the first multifunction unit is connected to receive an input from the matrix vector unit, a second multifunction unit, wherein the second multifunction unit is connected to receive an output from the first multifunction unit, and a third multifunction unit, wherein the third multifunction unit is connected to receive an output from the second multifunction unit;
• a decoder configured to decode a chain of instructions received via an input queue, wherein the chain of instructions comprises a first instruction that can only be processed by the matrix vector unit and a sequence of instructions that can only be processed by a multifunction unit;
• and
• a controller configured to map the first instruction for processing using the matrix vector unit and map each of instructions in the sequence of instructions for processing depending upon a position of the each of instructions in the sequence of the plurality of instructions, such that an instruction that is in a first position in the sequence of instructions is processed by the first multifunction unit, an instruction that is in a second position in the sequence of instructions is processed by the second multifunction unit, and an instruction that is in a third position in the sequence of instructions is processed by the third multifunction unit.