Smart repeater design for on-route repeater planning for bus
AssigneeSynopsys, Inc.
InventorsKai-Ping Wang, Haiying Liu
Life of this patent
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Abstract
A computerized system is disclosed. The computerized system may include one or more processors configured to perform the operations stored in a memory. The operations may include creating a plurality of library (lib) cells for a directional routing layer, and determining a lib cell of the plurality of lib cells for placement of at least one repeater for the directional routing layer. The operations may also include determining a route touch region corresponding to a pin region of the lib cell through which a route is going through and inserting the at least one repeater at the route touch region. The operations may also include swapping the at least one inserted repeater to at least one target lib cell of the plurality of lib cells.
Claims20
A system, comprising:
- a memory configured to store operations;
- and
- one or more processors configured to perform the operations, the operations comprising:
- deriving a plurality of master library cells from a plurality of target library cells of a directional routing layer on an integrated circuit,
- determining a plurality of route touch regions of a snapping region on a snapping pattern, wherein each route touch region of the plurality of route touch regions corresponds with a pin region of a master library cell of the plurality of master library cells,
- inserting a plurality of repeaters using the plurality of master library cells at the plurality of route touch regions upon determining that a route goes through a route touch region of the plurality of route touch regions, wherein the plurality of repeaters are inserted based on pin locations of the plurality of repeaters on a plurality of snapping grids, and
- removing a block between an inserted first repeater of the plurality of repeaters in a first snapping grid of the plurality of snapping grids and an inserted second repeater of the plurality of repeaters in a second snapping grid of the plurality of snapping grids by swapping the inserted first repeater to a target library cell of the plurality of target library cells according to a constraint between the inserted first repeater and the inserted second repeater, wherein the block between the inserted first repeater and the inserted second repeater is caused from the first snapping grid being different in size from the second snapping grid.
A method, comprising:
- deriving a plurality of master library cells from a plurality of target library cells of a directional routing layer on an integrated circuit;
- determining a plurality of route touch regions of a snapping region on a snapping pattern, wherein each route touch region of the plurality of route touch regions corresponds with a pin region of a master library cell of the plurality of master library cells;
- inserting a plurality of repeaters using the plurality of master library cells at the plurality of route touch regions upon determining that a route goes through a route touch region of the plurality of route touch regions, wherein the plurality of repeaters are inserted based on pin locations of the plurality of repeaters on a plurality of snapping grids;
- and
- removing a block between an inserted first repeater of the plurality of repeaters and an inserted second repeater of the plurality of repeaters by swapping the inserted first repeater to a target library cell of the plurality of target library cells according to a constraint between the inserted first repeater and the inserted second repeater, wherein the block between the inserted first repeater and the inserted second repeater is caused from the first snapping grid being different in size from the second snapping grid.
A non-transitory, tangible computer-readable device having instructions stored thereon that, when executed by at least one computing device, cause the at least one computing device to perform operations comprising:
- deriving a plurality of master library cells from a plurality of target library cells of a directional routing layer on an integrated circuit (IC);
- determining a plurality of route touch regions of a snapping region on a snapping pattern, wherein each route touch region of the plurality of route touch regions corresponds with a pin region of a master library cell of the plurality of master library cells;
- inserting a plurality of repeaters using the plurality of master library cells at the plurality of route touch regions upon determining that a route goes through a route touch region of the plurality of route touch regions, wherein the plurality of repeaters are inserted based on pin locations of the plurality of repeaters on a plurality of snapping grids;
- and
- removing a block between an inserted first repeater of the plurality of repeaters and an inserted second repeater of the plurality of repeaters by swapping the inserted first repeater to a target library cell of the plurality of target library cells according to a constraint between the inserted first repeater and the inserted second repeater, wherein the block between the inserted first repeater and the inserted second repeater is caused from the first snapping grid being different in size from the second snapping grid, and wherein the constraint comprises one of distance, equal routing length, or location.
Dependencies are inferred from the claim text.