Low cost design for test architecture

A method for translation based test architecture for testing a system under test having child cores comprising:

• generating base test patterns of the child cores in parallel by requiring logic zero input for all functional primary inputs (PI) to be translated by the translation layer;
• calculating any test patterns of child cores as a summation of the base test patterns and a difference of the environment;
• determining the difference of environment from the environment output provided to input of child cores under consideration;
• translating the input of cores under consideration to satisfy the input requirement which is to maintain the same inputs specified in the base test patterns for the testing of core independent of environment output;
• translating control signals to create test patterns with diversified test function implementation;
• creating new test patterns transformation of base test patterns based on the difference of environment;
• transforming the base patterns of each child core into environment incorporated test patterns;
• composing the environment incorporated test patterns of cores into a system under test patterns;
• applying the system under test pattern to the system under test;
• applying the transformation and composition to the system under test involving test compression;
• applying the transformation and composition to the multi-chip (MCM) system under test;
• applying the test architecture to built-in self-test (BIST);
• testing true functional paths through a translational layer without reconfiguring functional paths into the test.