Method and system for generating verification tests at runtime
AssigneeCadence Design Systems, Inc.
InventorMeir Ovadia
Life of this patent
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AssigneeCadence Design Systems, Inc.
InventorMeir Ovadia
Estimating the term…
A method includes generating on a host machine a validated verification test scenario comprising a graph defining a scheduled performance order of a plurality of actions to be performed on a DUT and a corresponding verification environment; obtaining a subset of one or more actions to be added to the validated scenario while maintaining the plurality of actions of the validated scenario and the scheduled performance order, forming an amended verification test scenario; and applying a runtime solver in a target language of the DUT and the corresponding verification environment on the amended verification test scenario to generate a test in a target code and to apply the test on the DUT and the corresponding verification environment wherein inclusion of any of said one or more actions or an order of performance of said one or more actions of the subset in the test is determined at runtime.
A method for generating verification tests at runtime, the method comprising:
A non-transitory computer readable storage medium for generating verification tests at runtime, having stored thereon instructions that when executed by a processor will cause the processor to:
A system for processing verification tests for generating verification tests at runtime, the system comprising:
Dependencies are inferred from the claim text.