Circuit for performing pooling operation in neural processor

A method for determining a denominator for a pooling operation, comprising:

• determining, by a first circuit, a first series of numbers representing numbers of valid elements in a row of a data surface covered by a row of a kernel when a first reference point of the row of the kernel is placed at different column locations of the row of the surface;
• determining, by a second circuit, a second series of numbers representing numbers of valid elements in a column of the data surface covered by a column of the kernel when a second reference point of the column of the kernel is placed at different locations of the column of the surface;
• and
• generating an array of denominator numbers representing numbers of valid elements covered by the kernel by matrix multiplying the first series of numbers with the second series of numbers.

An electronic device comprising a neural processor circuit, the neural processor circuit comprising:

• a first circuit configured to determine a first series of numbers representing numbers of valid elements in a row of a data surface covered by a row of a kernel when a first reference point of the row of the kernel is placed at different column locations of the row of the surface;
• a second circuit configured to determine a second series of numbers representing numbers of valid elements in a column of the data surface covered by a column of the kernel when a second reference point of the column of the kernel is placed at different locations of the column of the surface;
• and
• a matrix multiplier circuit coupled to the first circuit to receive the first series of numbers and coupled to the second circuit to receive the second series of numbers, the matrix multiplier circuit configured to generate an array of denominator numbers representing numbers of valid elements covered by the kernel by matrix multiplying the first series of numbers with the second series of numbers.