Flex bus protocol negotiation and enabling sequence
AssigneeIntel Corporation
InventorsDebendra Das Sharma, Michelle C. Jen, Prahladachar Jayaprakash Bharadwaj, Bruce A. Tennant, Mahesh Wagh
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AssigneeIntel Corporation
InventorsDebendra Das Sharma, Michelle C. Jen, Prahladachar Jayaprakash Bharadwaj, Bruce A. Tennant, Mahesh Wagh
Estimating the term…
Systems, methods, and devices can involve a host device that includes a root complex, a link, and an interconnect protocol stack coupled to a bus link. The interconnect protocol stack can include multiplexing logic to select one of a Peripheral Component Interconnect Express (PCIe) upper layer mode, or an accelerator link protocol upper layer mode, the PCIe upper layer mode or the accelerator link protocol upper layer mode to communicate over the link, and physical layer logic to determine one or more low latency features associated with one or both of the PCIe upper layer mode or the accelerator link protocol upper layer mode.
An apparatus comprising:
A system comprising:
An apparatus comprising:
A method performed by a host device, the method comprising:
Dependencies are inferred from the claim text.