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US 11,144,482 B1Granted
Bidirectional interface configuration for memory
AssigneeMicron Technology, Inc.
InventorsGlen E. Hush, Richard C. Murphy, Honglin Sun
Life of this patent
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Abstract
Apparatuses and methods can be related to configuring interface protocols for memory. An interface protocol can define the commands received by a memory device utilizing transceivers, receivers, and/or transmitters of an interface of a memory device. An interface protocol used by a memory device can be implemented utilizing a decoder of signals provided via a plurality of transceivers of the memory device. The decoder utilized by a memory device can be selected by setting a mode register of the memory device.
Claims20
An apparatus, comprising:
- a memory device including a plurality of transceivers;
- and
- a mode register coupled to the memory device, wherein the mode register is configured to:
- implement set commands;
- cause the memory device to be operated according to a first interface protocol in a first mode in response to implementing a first set command, wherein, according to the first interface protocol a particular one of the transceivers operates unidirectionally;
- and
- cause the memory device to be operated according to a second interface protocol in a second mode in response to implementing a second set command, wherein according to the second interface protocol the particular transceiver operates bidirectionally and the first interface protocol is noncompliant with the second interface protocol.
4 more elements
A method comprising:
- receiving a first signal, via a transceiver, to set a mode register of a memory device to configure the transceiver as unidirectional using a first interface protocol;
- receiving a second signal at the memory device, wherein the transceiver is configured as bidirectional using a second interface protocol selected responsive to receipt of the second signal and wherein the first interface protocol is noncompliant with the second interface protocol;
- and
- transmitting a third signal via the transceiver of the memory device responsive to setting the mode register and receipt of the second signal.
1 more element
An apparatus, comprising:
- a first transceiver;
- a device coupled to the first transceiver and configured to:
- cause to be transmitted, via the first transceiver, a first signal to set a mode register of a memory device to configure a second transceiver of the memory device utilizing a second interface protocol;
- cause the first transceiver configured with a first interface protocol to be configured utilizing the second interface protocol such that the first transceiver was unidirectional prior to being configured and is bidirectional after being configured, and wherein the first interface protocol is noncompliant with the second interface protocol;
- cause to be transmitted a second signal to the memory device utilizing the first transceiver and the second transceiver;
- and
- cause a third signal to be received via the first transceiver responsive to transmitting the second signal, the first signal, and configuring the first transceiver.
4 more elements
Dependencies are inferred from the claim text.