Dual address encoding for logical-to-physical mapping

A method, performed by a memory device, the method comprising:

• receiving, from a host device, a read command comprising:
• a first physical address of the memory device corresponding to a first logical block address generated by the host device;
• a second physical address of the memory device corresponding to a second logical block address generated by the host device:
• retrieving a first page of data from the first physical address of the memory device and a second page of data from the second physical address of the memory device;
• and
• transmitting the first page of data and the second page of data to the host device based at least in part on retrieving the first page of data and the second page of data.

A memory device, comprising:

• an array of memory cells;
• and
• a controller coupled with the array of memory cells and operable to cause the memory device to:
• identify a first logical block address associated with a first physical address of the memory device;
• identify a second logical block address associated with a second physical address of the memory device;
• store a first entry of a set of entries, the first entry comprising the first physical address and the second physical address, the first entry for mapping the first logical block address to the first physical address and the second physical address;
• store a second entry of the set of entries, the second entry comprising the second physical address and a third physical address associated with a third logical block address, the second entry for mapping the second logical block address to the second physical address and the third physical address;
• and
• transmit the set of entries to a host device.