Apparatus and method for performing cache maintenance over a virtual page
AssigneeArm Limited
InventorsJason Parker, Bruce James Mathewson, Matthew Lucien Evans
Life of this patent
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Abstract
An apparatus (2) comprises processing circuitry (4) for performing data processing in response to instructions. The processing circuitry (4) supports a cache maintenance instruction (50) specifying a virtual page address (52) identifying a virtual page of a virtual address space. In response to the cache maintenance instruction, the processing circuitry (4) triggers at least one cache (18, 20, 22) to perform a cache maintenance operation on one or more cache lines for which a physical address of the data stored by the cache line is within a physical page that corresponds to the virtual page identified by the virtual page address provided by the cache maintenance instruction.
Claims11
An apparatus comprising:
- instruction fetch circuitry to fetch instructions from a memory system;
- processing circuitry to perform data processing in response to the instructions fetched by the instruction fetch circuitry;
- at least one cache to store cached versions of data from a memory of the memory system;
- and
- translation circuitry to translate a virtual page address into a physical page address of a physical page;
- wherein the translation circuitry comprises a plurality of translation entries, each translation entry corresponding to a virtual page address and identifying the corresponding physical page address for that virtual page address;
- wherein in response to a cache maintenance instruction fetched by the instruction fetch circuitry and specifying a given virtual page address identifying a given virtual page of a virtual address space, the processing circuitry triggers the at least one cache to perform a cache maintenance operation on any cache lines for which a physical address of data stored by a cache line is within a given physical page that corresponds to the given virtual page identified by the given virtual page address;
- wherein performing the cache maintenance operation includes only a single lookup of the translation circuitry to translate the given virtual page address to a physical page address of the given physical page in order to perform the cache maintenance operation for the entire given physical page;
- wherein said physical address of data stored by the cache line is the physical address in the memory at which the corresponding data is stored for which the data stored in the cache line is a cached version;
- and
- wherein the cache maintenance instruction specifies one of a plurality of virtual page sizes, and in response to at least some cache maintenance instructions, the processing circuitry is configured to trigger issuing of a plurality of cache maintenance commands to said at least one cache, each cache maintenance command corresponding to a different block of physical addresses within the physical page corresponding to the virtual page identified by the virtual page address to perform the cache maintenance operation with the virtual page having the virtual page size specified by the cache maintenance instruction.
An apparatus comprising:
- instruction fetch means to fetch instructions from a memory system;
- processing means for performing data processing in response to the instructions fetched by the instruction fetch circuitry;
- and
- means for storing cached versions of data from a memory of the memory system;
- and
- translation means to translate a virtual page address into a physical page address of a physical page;
- wherein the translation means comprises a plurality of translation entries, each translation entry corresponding to a virtual page address and identifying the corresponding physical page address for that virtual page address;
- wherein in response to a cache maintenance instruction fetched by the instruction fetch circuitry and specifying a given virtual page address identifying a given virtual page of a virtual address space, the processing means is configured to trigger the means for storing cached versions of data from the memory to perform a cache maintenance operation on any cache lines for which a physical address of data stored by a cache line is within a given physical page that corresponds to the given virtual page identified by the given virtual page address;
- wherein performing the cache maintenance operation includes only a single lookup of the translation means to translate the given virtual page address to a physical page address of the given physical page in order to perform the cache maintenance operation for the entire given physical page;
- wherein said physical address of data stored by the cache line is the physical address in the memory at which the corresponding data is stored for which the data stored in the cache line is a cached version;
- and
- wherein the cache maintenance instruction specifies one of a plurality of virtual page sizes, and in response to at least some cache maintenance instructions, the processing means is configured to trigger issuing of a plurality of cache maintenance commands to said means for storing cached versions of data from the memory, each cache maintenance command corresponding to a different block of physical addresses within the physical page corresponding to the virtual page identified by the virtual page address to perform the cache maintenance operation with the virtual page having the virtual page size specified by the cache maintenance instruction.
A method of data processing comprising:
- fetching cache maintenance instructions from a memory system;
- receiving a cache maintenance instruction fetched from the memory system and specifying a virtual page address identifying a virtual page of a virtual address space;
- and
- in response to the cache maintenance instruction, triggering at least one cache that stores cached versions of data from a memory to perform a cache maintenance operation on any cache lines for which a physical address of data stored by a cache line is within a physical page that corresponds to the virtual page identified by the virtual page address;
- wherein said physical address of data stored by the cache line is the physical address in the memory at which the corresponding data is stored for which the data stored in the cache line is a cached version;
- wherein performing the cache maintenance operation includes only a single lookup of translation circuitry to translate the virtual page address to a physical page address of the physical page in order to perform the cache maintenance operation for the entire given physical page;
- and
- wherein the cache maintenance instruction specifies one of a plurality of virtual page sizes, and in response to at least some cache maintenance instructions, the at least one cache is triggered to issue a plurality of cache maintenance commands to the at least one cache, each cache maintenance command corresponding to a different block of physical addresses within the physical page corresponding to the virtual page identified by the virtual page address to perform the cache maintenance operation with the virtual page having the virtual page size specified by the cache maintenance instruction.
Dependencies are inferred from the claim text.