Debug for multi-threaded processing

A method, comprising:

• receiving a debug command via an interface;
• broadcasting a debug request, by a debug control, to a plurality of hardware schedulers within a hardware thread scheduler based on the debug command, each of the schedulers configured to schedule processing of tasks by a corresponding one of a plurality of hardware pipelines that include respective hardware accelerators;
• sending a first acknowledgment, by the plurality of schedulers, to indicated that the debug command has been received;
• processing the debug request by the schedulers to advance at least one active pipeline to a next stable state, wherein the processing is preformed by a one of the schedulers corresponding to the active pipelines other then the active pipeline;
• and
• sending a second acknowledgement to indicate that the debug command has been processed, by the schedulers.

A system, the system comprising:

• a hardware thread scheduler configured to schedule processing of data, the hardware thread scheduler comprising:
• a plurality of hardware task schedulers, each corresponding to and configured to schedule a different one of a plurality of hardware pipelines for processing instructions associated with the data;
• and
• a plurality of memory schedulers programmed to move blocks of data using direct memory access operations, the plurality of memory schedulers being coupled with the plurality of task schedulers via a cross bar;
• and
• a debug control configured to control at least a controlled one of the task schedulers to halt, stop, or resume a respective one of the pipelines corresponding to the controlled task scheduler for the data to enable debugging of the respective pipeline independently of task schedulers other than the controlled task scheduler and independently of pipelines other than the respective pipeline.