AC parallelization circuit, AC parallelization method, and parallel information processing device
AssigneeFujitsu Limited
InventorHisanao Akima
Life of this patent
Estimating the term…
Abstract
An AC parallelization circuit includes a transmitting circuit configured to transmit a stop signal to instruct a device for executing calculation in an iteration immediately preceding an iteration for which a concerned device is responsible to stop the calculation in loop-carried dependency calculation; and an estimating circuit configured to generate, as a result of executing the calculation in the preceding iteration, an estimated value to be provided to an arithmetic circuit when the transmitting circuit transmits the stop signal.
Claims7
An AC parallelization circuit, comprising:
- a transmitting circuit configured to transmit a stop signal to instruct a device for executing calculation in an iteration immediately preceding an iteration for which a concerned device is responsible to stop the calculation in loop-carried dependency calculation;
- and
- an estimating circuit configured to generate, as a result of executing the calculation in the preceding iteration, an estimated value to be provided to an arithmetic circuit when the transmitting circuit transmits the stop signal.
An AC parallelization method executed by a computer, the AC parallelization method comprising:
- transmitting a stop signal to instruct a device for executing calculation in an iteration immediately preceding an iteration for which a concerned device is responsible to stop the calculation in loop-carried dependency calculation;
- and
- providing an estimated value generated as an estimated value of a result of executing the calculation in the preceding iteration to an arithmetic circuit when the stop signal is transmitted.
A parallel information processing device, comprising:
- an arithmetic unit configured to execute calculation in an iteration for which the parallel information processing device is responsible in loop-carried dependency calculation;
- a transmitter configured to transmit a stop signal to instruct a device for executing calculation in an iteration immediately preceding the iteration for which the parallel information processing device is responsible to stop the calculation in the loop-carried dependency calculation;
- and
- an estimator configured to generate, as a result of executing the calculation in the preceding iteration, an estimated value to be provided to the arithmetic unit when the transmitter transmits the stop signal.
Dependencies are inferred from the claim text.