Valid data merging method, memory control circuit unit and memory storage apparatus

A memory control circuit unit for controlling a rewritable non-volatile memory module, wherein the memory control circuit unit comprises:

• a host interface, configured to couple to a host system;
• a memory interface, configured to couple to the rewritable non-volatile memory module, wherein the rewritable non-volatile memory module includes a plurality of physical erasing units, the plurality of physical erasing units are grouped into at least a first area and a second area, the first area includes a plurality of first physical erasing units of the plurality of physical erasing units and the second area includes a plurality of second physical erasing units of the plurality of physical erasing units;
• and
• a memory management circuit, coupled to the host interface and the memory interface,
• wherein the memory management circuit is configured to obtain a first system parameter corresponding to the first area and a second system parameter corresponding to the second area when performing a valid data merging operation,
• wherein the memory management circuit is further configured to determine whether the first system parameter is greater than the second system parameter,
• when the first system parameter is greater than the second system parameter, the memory management circuit is further configured to preferentially select a third physical erasing unit from the plurality of second physical erasing units of the second area, and perform the valid data merging operation by using the third physical erasing unit,
• when the first system parameter is not greater than the second system parameter, the memory management circuit is further configured to preferentially select a fourth physical erasing unit from the plurality of first physical erasing units of the first area, and perform the valid data merging operation by using the fourth physical erasing unit,
• wherein the plurality of physical erasing units are at least grouped into a storage area and a spare area, each of the first area and the second area comprises the storage and the spare areas, the third physical erasing unit and the fourth physical erasing unit belong to the spare area,
• when a number of the spare area of the second area is lower than a first threshold, the memory management circuit is further configured to select the third physical erasing unit from the plurality of first physical erasing units of the first area,
• when a number of the spare area of the first area is lower than a second threshold, the memory management circuit is further configured to select the fourth physical erasing unit from the plurality of second physical erasing units of the second area.

A memory storage apparatus, comprising:

• a connection interface unit, configured to couple to a host system;
• a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module includes a plurality of physical erasing units, the plurality of physical erasing units are grouped into at least a first area and a second area, the first area includes a plurality of first physical erasing units of the plurality of physical erasing units and the second area includes a plurality of second physical erasing units of the plurality of physical erasing units;
• and
• a memory control circuit unit, coupled to the connection interface unit and the rewritable non-volatile memory module,
• wherein the memory control circuit unit is configured to obtain a first system parameter corresponding to the first area and a second system parameter corresponding to the second area when performing a valid data merging operation,
• wherein the memory control circuit unit is further configured to determine whether the first system parameter is greater than the second system parameter,
• when the first system parameter is greater than the second system parameter, the memory control circuit unit is further configured to preferentially select a third physical erasing unit from the plurality of second physical erasing units of the second area, and perform the valid data merging operation by using the third physical erasing unit,
• when the first system parameter is not greater than the second system parameter, the memory control circuit unit is further configured to preferentially select a fourth physical erasing unit from the plurality of first physical erasing units of the first area, and perform the valid data merging operation by using the fourth physical erasing unit,
• wherein the plurality of physical erasing units are at least grouped into a storage area and a spare area, each of the first area and the second area comprises the storage and the spare areas, the third physical erasing unit and the fourth physical erasing unit belong to the spare area,
• when a number of the spare area of the second area is lower than a first threshold, the memory control circuit unit is further configured to select the third physical erasing unit from the plurality of first physical erasing units of the first area,
• when a number of the spare area of the first area is lower than a second threshold, the memory control circuit unit is further configured to select the fourth physical erasing unit from the plurality of second physical erasing units of the second area.