Computer system power monitoring

A method, comprising:

• performing wafer-level testing on a particular integrated circuit that includes a voltage regulator circuit to generate wafer-level test data;
• setting one or more operation parameters of the voltage regulator circuit based on the wafer-level test data;
• mounting the particular integrated circuit with a different integrated circuit on a common substrate;
• activating a test mode at respective time periods of a plurality of time periods;
• in response to activating the test mode:
• converting, by a measurement circuit, a plurality of bits to an analog voltage level to generate a stimulation signal;
• applying, by the measurement circuit, the stimulation signal to a passive circuit element coupled to the voltage regulator circuit;
• measuring, by the measurement circuit, a response of the passive circuit element after the particular integrated circuit has been mounted on the common substrate with the different integrated circuit;
• sampling, at a plurality of sample time points, the response to of the passive circuit element to generate corresponding ones of a plurality of data words;
• and
• adapting, by a control circuit included in the particular integrated circuit, operation of the voltage regulator circuit based on the plurality of data words.

A non-transitory computer-readable storage medium having design information stored thereon, wherein the design information specifies a design of at least a portion of a hardware integrated circuit in a format recognized by a semiconductor fabrication system that is configured to use the design information to produce the hardware integrated circuit according to the design information, wherein the design information specifies that the hardware integrated circuit comprises:

• a voltage regulator circuit configured to generate a voltage level on a power supply of a computer system using a source power supply and based on initial values of one or more operation parameters derived from wafer-level test data;
• a passive circuit element coupled to the voltage regulator circuit;
• a measurement circuit configured, in response to an activation of a test mode, to:
• convert a plurality of bits to an analog voltage level to generate a stimulation signal;
• apply the stimulation signal to the passive circuit element;
• measure a response of the passive circuit element to the stimulation signal;
• sample, at a plurality of sample time points, the response of the passive circuit element to generate corresponding ones of a plurality of data words;
• and
• a control circuit configured to adapt operation of the voltage regulator circuit based on the plurality of data words.