Back to results
US 11,144,080 B2Granted
Switched low-dropout voltage regulator
AssigneeNVIDIA Corporation
InventorsSudhir Kudva, John Wilson
Life of this patent
Estimating the term…
Abstract
High-resolution switched digital regulators are disclosed having fast cross corner and variable temperature response, with constrained ripple. The strength of the power transistors utilized by the regulator are adjusted to control the current delivered to the load. The regulators utilize a slow control loop in parallel with a primary fast switching loop. The slow loop uses the switching signal of the primary loop to estimate the load current and set the power transistor size accordingly.
Claims9
A voltage regulator comprising:
- a single power transistor controlling a load current;
- a fast switching loop;
- a slow control loop generating a signal applied simultaneously with a signal of the fast switching loop to the at least one power transistor, the slow control loop responding more slowly to changes in the load current than the fast switching loop;
- and
- the slow control loop setting an intermediate voltage between a supply voltage and a ground voltage at a gate of the power transistor.
2 more elements
A regulated power supply, comprising:
- a power transistor comprising a gate driven by a control signal from a first control loop and a control signal from a second control loop;
- the second control loop responding to a switching signal of the first control loop to determine a strength setting for the power transistor by setting an intermediate voltage between a supply voltage and a ground voltage at the gate of the power transistor;
- and
- the second control loop configured to respond more slowly than the first control loop to changes in a load voltage regulated by the power supply.
1 more element
A power supply comprising:
- a single power transistor;
- a first feedback loop from an output of the power transistor back to a gate of the power transistor, the first feedback loop comprising a voltage controller;
- a second feedback loop signal from the output of the power transistor back to the gate of the power transistor;
- and
- wherein the first feedback loop and the second feedback loop are merged at inputs of an inverter, and an output of the inverter is applied to the gate of the power transistor.
2 more elements
Dependencies are inferred from the claim text.