Chirp linearity detector for radar

A method comprising:

• receiving a phase locked loop (PLL) output signal from a PLL;
• adjusting a frequency divisor in accordance with an analog-to-digital converter (ADC) input frequency range of an ADC;
• dividing the PLL output signal according to the frequency divisor to provide a frequency divided output signal;
• reducing harmonic mixing using a first low pass filter circuit to produce a mixer input signal;
• mixing the mixer input signal with a local oscillator (LO) signal to provide a mixer output signal;
• performing anti-aliasing filtering using a second low pass filter circuit to provide an analog-to-digital converter (ADC) input signal;
• and
• digitizing, at an ADC circuit, the ADC input signal to provide a digital output signal.

An integrated circuit comprising:

• a phase-locked loop (PLL) frequency sampling circuit;
• and
• a frequency sweep linearity measuring circuit, the frequency sweep linearity measuring circuit coupled to the PLL frequency sampling circuit, the PLL frequency sampling circuit comprising:
• a programmable-divisor frequency divider circuit for receiving a PLL output signal from a PLL, for performing frequency division according to a programmable divisor value, and for providing a frequency divided output signal;
• a first low pass filter circuit coupled to the programmable-divisor frequency divider circuit, the first low pass filter circuit for receiving the frequency divided output signal, for reducing harmonic mixing, and for providing a mixer input signal;
• a mixer circuit coupled to the first low pass filter circuit, the mixer circuit for receiving the mixer input signal, for mixing the mixer input signal with a local oscillator signal, and for providing a mixer output signal;
• a second low pass filter circuit coupled to the mixer circuit, the second low pass filter circuit for receiving the mixer output signal, for performing anti-aliasing filtering, and for providing an analog-to-digital converter (ADC) input signal;
• and
• an ADC circuit coupled to the second low pass filter circuit, the ADC circuit for receiving the ADC input signal, for digitizing the ADC input signal, and for providing a digital output signal.