US 11,139,818 B1 · Fast-locking phase-locked loop and associated fast-locking method thereof

Abstract

A fast-locking phase-locked loop (PLL) and an associated fast-locking method thereof are provided. The fast-locking PLL may include a gear-shifting loop filter, which is configured to have a dynamic bandwidth. The gear-shifting loop filter may include a resistor set and a capacitor set coupled to the resistor set, where the resistor set is configured to have a dynamic resistance, and the capacitor set is configured to have a dynamic capacitance. More particularly, the dynamic resistance is switched from a first resistance to a second resistance and the dynamic capacitance is switched from a first capacitance to a second capacitance, to make the dynamic bandwidth be switched from a first bandwidth to a second bandwidth.

Claims20

Dependent claims

A fast-locking phase-locked loop (PLL), comprising:

a gear-shifting loop filter, configured to have a dynamic bandwidth, wherein the gear-shifting loop filter comprising:
a resistor set, configured to have a dynamic resistance;
a capacitor set, coupled to the resistor set, configured to have a dynamic capacitance, wherein the capacitor set comprises a first capacitor and a second capacitor;
and
a voltage buffer, configured to copy a voltage level on the first capacitor to the second capacitor;
wherein the dynamic resistance is switched from a first resistance to a second resistance and the dynamic capacitance is switched from a first capacitance to a second capacitance, to make the dynamic bandwidth be switched from a first bandwidth to a second bandwidth.

3 more elements

A fast-locking method of a fast-locking phase-locked loop (PLL), comprising:

utilizing a resistor set of a gear-shifting loop filter within the fast-locking PLL to control a dynamic resistance and utilizing a capacitor set of the gear-shifting loop filter to control a dynamic capacitance, to make the gear-shifting loop filter have a dynamic bandwidth, wherein the capacitor set comprises a first capacitor and a second capacitor;
with aid of a voltage buffer within the gear-shifting loop filter, copying a voltage level on the first capacitor to the second capacitor;
and
switching the dynamic resistance from a first resistance to a second resistance, and switching the dynamic capacitance from a first capacitance to a second capacitance, to make the dynamic bandwidth be switched from a first bandwidth to a second bandwidth.

1 more element

Dependencies are inferred from the claim text.

Fast-locking phase-locked loop and associated fast-locking method thereof

Life of this patent

Fast-locking phase-locked loop and associated fast-locking method thereof

Life of this patent

Abstract

Claims20