Bi-directional adaptive clocking circuit supporting a wide frequency range

A bi-directional adaptive clocking circuit supporting a wide frequency range, comprising:

• a phase clock generating module, with an input end connected with a system clock, and generating N delay clock signals with different phases, wherein N is an integer greater than 1,
• an adaptive clock stretching or compressing amount regulating circuit module, with an input end receiving a timing early-warning signal sent out by a chip or delay information of a critical path of the chip and receiving the N delay clock signals with the different phases output by the phase clock generating module, monitoring a timing slack or a timing violation value of the chip in real time, and outputting a stretching scale signal after the timing slack of the chip is widened according to the N delay clock signals with the different phases, or outputting a compressing scale signal after the timing violation value is widened according to the N delay clock signals with the different phases,
• a control module, with an input end receiving the stretching scale signal or the compressing scale signal output by the adaptive clock stretching or compressing amount regulating circuit module, and generating adaptive clock selecting control signals, and
• a phase clock selecting module, with an input end receiving the adaptive clock selecting control signals and the N delay clock signals with the different phases, and selecting a target phase clock signal from the N delay clock signals with the different phases to be output.