Semiconductor package including stacked semiconductor chips and method for fabricating the same
AssigneeSK hynix Inc.
InventorJae-Min Kim
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AssigneeSK hynix Inc.
InventorJae-Min Kim
Estimating the term…
A semiconductor package may include: a chip stack including first to Nth semiconductor chips having first to Nth chip pads formed in active surfaces thereof, respectively, and sequentially stacked in a vertical direction such that the first to Nth chip pads are exposed, wherein N is a natural number equal to or more than 2; first to Nth vertical wires having first ends connected to the first to Nth chip pads, respectively, and extended in the vertical direction; a coating layer surrounding portions of the first to kth vertical wires, extended from the first ends, among the first to Nth vertical wires, and connection portions between the first ends of the first to kth vertical wires and the first to kth chip pads; and a molding layer covering the chip stack, surrounding the vertical wires, and covering the coating layer.
A semiconductor package comprising:
A method for fabricating a semiconductor package, comprising:
Dependencies are inferred from the claim text.