Semiconductor device including first-in first-out circuit
AssigneeLapis Semiconductor Co., Ltd.
InventorKenjiro Matoba
Life of this patent
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Abstract
A semiconductor device including a FIFO circuit in which a data capacity can be increased while minimizing an increase in a circuit scale is provided. The semiconductor device includes a single-port type storage unit (11) which stores data, a flip-flop (12) which temporarily stores write data (FIFO input) or read data (FIFO output) of the storage unit (11), and a control unit (14, 40) which controls a write timing of a data signal, which is stored in the flip-flop (12), to the storage unit (11) or a read timing of the data signal from the storage unit to avoid an overlap between a write operation and a read operation in the storage unit (11).
Claims2
A semiconductor device comprising:
- a single-port type storage unit which stores data;
- a flip-flop which temporarily stores write data or read data of the storage unit;
- and
- a control unit which controls a write timing of a data signal stored in the flip-flop to the storage unit or a read timing of the data signal from the storage unit to avoid an overlap between a write operation and a read operation in the storage unit, wherein
- the control unit comprises:
- an address control unit which controls a write address on the basis of a write control signal and controls a read address on the basis of a read control signal when writing and reading the storage unit;
- and
- a generation unit which outputs a signal that determines the write timing or the read timing on the basis of a write enable signal and a read enable signal as the write control signal or the read control signal, and wherein
- the flip-flop comprises a first D-type flip-flop connected to a data write port of the storage unit in which the write data is input to a data input and a logical AND of the write enable signal and a clock signal is input to a clock input,
- the generation unit outputs a signal that determines the write timing as the write control signal, and
- the read enable signal is input to the address control unit as the read control signal.
A semiconductor device comprising:
- a single-port type storage unit which stores data;
- a flip-flop which temporarily stores write data or read data of the storage unit;
- and
- a control unit which controls a write timing of a data signal stored in the flip-flop to the storage unit or a read timing of the data signal from the storage unit to avoid an overlap between a write operation and a read operation in the storage unit, wherein
- the control unit comprises:
- an address control unit which controls a write address on the basis of a write control signal and controls a read address on the basis of a read control signal when writing and reading the storage unit;
- and
- a generation unit which outputs a signal that determines the write timing or the read timing on the basis of a write enable signal and a read enable signal as the write control signal or the read control signal, and wherein
- the flip-flop comprises:
- a second D-type flip-flop connected to a data read port of the storage unit in which the read data is input to a data input and a logical AND of the read control signal and a clock signal is input to a clock input;
- and
- a third D-type flip-flop in which an output of the second D-type flip-flop is input to a data input and a logical AND of the read enable signal and the clock signal is input to a clock input,
- the generation unit outputs a signal that determines the read timing as the read control signal, and
- the write enable signal is input to the address control unit as the write control signal.
Dependencies are inferred from the claim text.