US 11,126,572 B2 · Methods and systems for streaming data packets on peripheral component interconnect (PCI) and on-chip bus interconnects

Abstract

A method and architecture to write data between a source and destination by memory mapped writes or streaming packets between any of a host, a peripheral or a sub-peripheral device. A stream address is used to write the data to a memory of the destination without the source being aware of physical addresses of destination memory, i.e., memory descriptors or pointers are not used, allowing the destination to manage its own memory. The stream address may enable streaming data packets over interconnects that may not allow packet streaming by dividing a data packet into data chunks and including a stream address for each chunk. The stream address for a given packet includes a repeated first portion indicating the destination and a varied second portion indicating variable information for each data chunk such as start of packet (SoP) and end of packet (EoP) identifiers.

Claims20

Dependent claims

An apparatus for use in an electronic device, the apparatus comprising:

a writable memory circuit to store write data from a separate source device;
an interface with a first data interconnect;
and
a memory controller in communication with the writable memory circuit and adapted to manage physical addresses of the writable memory circuit to store the write data received from the source device, via the first data interconnect, into said writeable memory circuit, the write data having a stream address distinguishing the write data between a memory mapped write and a streamed data packet write, and wherein said memory controller causes said write data to be stored in said writable memory circuit at a physical memory address unknown to the source device, and without memory pointers or descriptors exchanged between the apparatus and the source device.

1 more element

Dependencies are inferred from the claim text.

Methods and systems for streaming data packets on peripheral component interconnect (PCI) and on-chip bus interconnects

Life of this patent

Methods and systems for streaming data packets on peripheral component interconnect (PCI) and on-chip bus interconnects

Life of this patent

Abstract

Claims20