# US 11,121,731 B2 · Digital radio head control > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,121,731 B2 - Document ID: US11121731B2 - Status: Granted - Kind: B2 - Application number: 16/550,574 - Filed: 2019-08-26 - Published: 2021-03-04 - Granted: 2021-09-14 - Earliest claimed: 2019-08-26 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Ashoke Ravi; Benjamin Jann; Satwik Patnaik; Elan Banin; Igal Kushnir; Ofir Degani; Alexandros Margomenos - Web page: https://patentgrep.com/patent/US11121731B2 ## CPC - H04B 1/0458: {Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages (matching circuits in general H03H)} - H04B 1/0483: {Transmitters with multiple parallel paths} - G01R 27/06: Measuring reflection coefficients; Measuring standing-wave ratio - H01Q 3/40: with phasing matrix - H03L 7/0816: {the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input} - H03L 7/24: using a reference signal directly applied to the generator - H04B 1/0475: {with means for limiting noise, interference or distortion (H04B1/0483 takes precedence)} - H04B 2001/0425: {with linearisation using predistortion} - H04B 2001/0433: {with linearisation using feedback} - H04B: TRANSMISSION - G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12) - H01Q: ANTENNAS, i.e. RADIO AERIALS (radiators or antennas for microwave heating H05B6/72) - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) ## Abstract Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems. ## Claims ### Claim 1 A transceiver, comprising: a plurality of digital transceiver portions coupled to a common digital front end (DFE), each digital transceiver portion from among the plurality of digital transceiver portions being configured to operate in accordance with the same communication protocol using data communicated with the common DFE, and comprising: transmit path circuitry coupled to an antenna, the transmit path circuitry configured to convert digital transmit data received from the common DFE to an analog transmit signal that is transmitted via the antenna; a DC-DC converter coupled to each digital transceiver portion, the DC-DC converter being configured to provide a supply voltage; and one or more feedback components configured to provide feedback measurements with regards to operation of the each respective digital transceiver portion; and processor circuitry configured to adjust the supply voltage provided by the DC-DC converter for each respectively coupled digital transceiver portion independently of one another based upon the feedback measurements. ### Claim 2 (depends on 1) The transceiver of claim 1, wherein the processor circuitry is configured to adjust the supply voltage provided by the DC-DC converter of at least one respectively coupled digital transceiver portion to change an amplifier bias setting of an amplifier associated with the transmit path circuitry. ### Claim 3 (depends on 2) The transceiver of claim 2, wherein the processor circuitry is configured to adjust the supply voltage provided by the DC-DC converter of at least one respectively coupled digital transceiver portion to change the amplifier bias setting of the amplifier to track a modulation envelope of the analog transmit signal that is transmitted via the antenna. ### Claim 4 (depends on 1) The transceiver of claim 1, wherein the one or more feedback components are configured to measure a forward and reverse power within the transmit path circuitry associated with the analog transmit signal that is transmitted via the antenna, and wherein the processor circuitry is configured to (i) track a voltage standing wave ratio (VSWR) between the transmit path circuitry and the antenna using the measured forward and reverse power, and (ii) change an amplifier bias setting of an amplifier associated with the transmit path circuitry based upon the tracked VSWR. ### Claim 5 (depends on 1) The transceiver of claim 1, wherein each digital transceiver portion from among the plurality of digital transceiver portions further comprises: a digital front end (DFE) portion corresponding to each digital transceiver portion within the transmit path circuitry, each respective DFE portion being configured to apply digital pre-distortion (DPD) parameters to the digital transmit data, wherein the processor circuitry is configured to adjust the DPD parameters for each respective digital transceiver portion independently of one another based upon the feedback measurements. ### Claim 6 (depends on 4) The transceiver of claim 4, wherein each digital transceiver portion from among the plurality of digital transceiver portions further comprises: a digital front end (DFE) portion corresponding to each digital transceiver portion within the transmit path circuitry, each respective DFE portion being configured to apply digital pre-distortion (DPD) parameters to the digital transmit data, and wherein the processor circuitry is configured to adjust the DPD parameters for each respective digital transceiver portion independently of one another based upon the tracked VSWR. ### Claim 7 (depends on 1) The transceiver of claim 1, wherein the one or more feedback components are configured to measure a junction temperature of an amplifier associated with the transmit path circuitry, and wherein the processor circuitry is configured to adjust the supply voltage provided by the DC-DC converter of at least one respectively coupled digital transceiver portion to change an amplifier bias setting of the amplifier based upon the measured junction temperature. ### Claim 8 (depends on 2) The transceiver of claim 2, wherein the processor circuitry is configured to adjust the supply voltage provided by the DC-DC converter of at least one respectively coupled digital transceiver portion to change the amplifier bias setting to cause the analog transmit signal that is transmitted via the antenna to have a magnitude in accordance with a stored codebook value. ### Claim 9 (depends on 1) The transceiver of claim 1, further comprising: receive path circuitry coupled to the antenna, and wherein the processor circuitry is configured to adjust the supply voltage provided by the DC-DC converter of at least one respectively coupled digital transceiver portion to change an amplifier bias setting of an amplifier associated with the receive path circuitry. ### Claim 10 A wireless device, comprising: a plurality of digital transceiver portions coupled to a common digital front end (DFE), each digital transceiver portion from among the plurality of digital transceiver portions being configured to: operate in accordance with the same communication protocol using data communicated with the common DFE, provide a supply voltage via a respectively coupled DC-DC converter, and provide feedback measurements with regards to an operation of each respective digital transceiver portion; and processor circuitry configured to adjust the supply voltage provided by each DC-DC converter of each respective digital transceiver portion independently of one another based upon the feedback measurements from each respective digital transceiver portion. ### Claim 11 (depends on 10) The wireless device of claim 10, wherein the processor circuitry is configured to adjust the supply voltage provided by each DC-DC converter of each respective digital transceiver portion to change an amplifier bias setting of an amplifier associated with transmit path circuitry included in each respective digital transceiver portion. ### Claim 12 (depends on 10) The wireless device of claim 10, wherein the processor circuitry is configured to adjust the supply voltage provided by each DC-DC converter of each respective digital transceiver portion to change an amplifier bias setting of an amplifier associated with receive path circuitry included in each respective digital transceiver portion. ### Claim 13 (depends on 11) The wireless device of claim 11, wherein the processor circuitry is configured to change the amplifier bias setting of the amplifier associated with transmit path circuitry included in each respective digital transceiver portion to track a modulation envelope of a transmitted signal that is associated with each respective digital transceiver portion. ### Claim 14 (depends on 10) The wireless device of claim 10, wherein one or more feedback components included in each respective digital transceiver portion are configured to measure a forward and reverse power within transmit path circuitry associated with each respective digital transceiver portion, and wherein the processor circuitry is configured to (i) track a voltage standing wave ratio (VSWR) using the measured forward and reverse power, and (ii) change an amplifier bias setting of an amplifier associated with the transmit path circuitry included in each respective digital transceiver portion based upon the tracked VSWR. ### Claim 15 (depends on 10) The wireless device of claim 10, wherein each digital transceiver portion from among the plurality of digital transceiver portions further comprises: a digital front end (DFE) portion within transmit path circuitry included in each respective digital transceiver portion, each respective DFE, portion being configured to apply digital pre-distortion (DPD) parameters to digital transmit data received from the common DFE, and wherein the processor circuitry is configured to adjust the DPD parameters for each respective digital transceiver portion independently of one another based upon the feedback measurements. ### Claim 16 (depends on 14) The wireless device of claim 14, wherein each digital transceiver portion from among the plurality of digital transceiver portions further comprises: a digital front end (DFE) portion within transmit path circuitry included in each respective digital transceiver portion, each respective DFE portion being configured to apply digital pre-distortion (DPD) parameters to digital transmit data received from the common DFE, and wherein the processor circuitry is configured to adjust the DPD parameters for each respective digital transceiver portion independently of one another based upon the tracked VSWR. ### Claim 17 (depends on 10) The wireless device of claim 10, wherein one or more feedback components included in each respective digital transceiver portion are configured to measure a junction temperature of an amplifier associated with transmit path circuitry included in each respective digital transceiver portion, and wherein the processor circuitry is configured to adjust the supply voltage provided by the DC-DC converter for each respective digital transceiver portion independently of one another to change an amplifier bias setting of the amplifier based upon the measured junction temperature. ### Claim 18 (depends on 10) The wireless device of claim 10, wherein the processor circuitry is configured to adjust the supply voltage provided by each DC-DC converter included in each respective digital transceiver portion independently of one another to change an amplifier bias setting of an amplifier associated with transmit path circuitry included in each respective digital transceiver portion to cause a transmit signal to have a magnitude in accordance with a stored codebook magnitude value. ### Claim 19 (depends on 1) The transceiver of claim 1, wherein each digital transceiver portion from among the plurality of digital transceiver portions further comprises a digital front end (DFE) portion separate from the common DFE, the common DFE and the DFE portion corresponding to each digital transceiver portion being configured to perform different functions with respect to the same communication protocol. ### Claim 20 (depends on 2) The transceiver of claim 2, wherein each digital transceiver portion from among the plurality of digital transceiver portions is coupled to a different respective antenna element within a phased antenna array, and wherein the processor circuitry is configured to adjust the supply voltage provided by the DC-DC converter of each respectively coupled digital transceiver portion to perform amplitude tapering across the different respective antenna elements of the phased antenna array by adjusting bias conditions of an amplifier that is associated with each respectively coupled digital transceiver portion independently of one another.