# US 11,121,706 B1 · Duty cycle correction circuit and semiconductor system

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- Number: US 11,121,706 B1
- Document ID: US11121706B1
- Status: Granted
- Kind: B1
- Application number: 17/084,117
- Filed: 2020-10-29
- Granted: 2021-09-14
- Earliest claimed: 2020-05-21
- Assignees: SK hynix Inc.
- Applicants: SK hynix Inc.
- Inventors: Kwang Soon Kim; Noh Hyup Kwak
- Web page: https://patentgrep.com/patent/US11121706B1

## CPC

- H03K 3/017: Adjustment of width or dutycycle of pulses (pulse width modulation H03K7/08 {; to maintain energy constant H03K3/015})
- G11C 7/1012: {Data reordering during input/output, e.g. crossbars, layers of multiplexers, shifting or rotating}
- G11C 7/1066: {Output synchronization}
- G11C 7/222: {Clock generating, synchronizing or distributing circuits within memory device}
- G11C 11/4076: Timing circuits (for regeneration management G11C11/406)
- G11C 11/4096: Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
- G11C 29/50012: {of timing}
- H03K 5/151: with two complementary outputs
- H03K 5/1565: {the output pulses having a constant duty cycle}
- G11C 2207/2254: Calibration
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A duty cycle correction circuit may include a data alignment circuit, a correction value generation circuit, and a dock generation circuit. The data alignment circuit may align unit pattern data based on a strobe clock signal. The correction value generation circuit may generate a duty correction value by measuring the amount of charges corresponding to the aligned data. The clock generation circuit may correct the duty ratio of the strobe clock signal based on the duty correction value.

## Claims

### Claim 1

A duty cycle correction circuit comprising:
a data alignment circuit suitable for receiving unit pattern data into which at least one measurement data has been inserted and aligning the unit pattern data based on a strobe clock signal;
a correction value generation circuit suitable for counting a section from time at which a duty measurement operation is entered to time at which charges for charging corresponding to the measurement data aligned by the data alignment circuit are stored by a preset value and outputting the section as a duty correction value; and
a clock generation circuit suitable for generating the strobe clock signal and correcting a duty ratio of the strobe clock signal based on the duty correction value.

### Claim 2 (depends on 1)

The duty cycle correction circuit according to claim 1, further comprising a data generation circuit suitable for continuously generating the unit pattern data upon the duty measurement operation.

### Claim 3 (depends on 1)

The duty cycle correction circuit according to claim 1, wherein the correction value generation circuit comprises:
an input circuit suitable for receiving the aligned measurement data and generating charging data in an enable section of an enable signal;
a charging circuit suitable for storing the charges for charging corresponding to the charging data output by the input circuit;
a detection circuit suitable for detecting time at which the charges for charging stored in the charging circuit are stored by the preset value and controlling the enable signal; and
a processing circuit suitable for generating the duty correction value by comparing, with a preset reference counting value, a measurement counting value obtained by counting the aligned measurement data input during the enable section of the enable signal.

### Claim 4 (depends on 3)

The duty cycle correction circuit according to claim 3, wherein the processing circuit comprises:
is a counting circuit suitable for generating the measurement counting value through a counting operation based on the charging data;
a setting circuit suitable for setting the reference counting value corresponding to the preset value; and
a comparison circuit suitable for generating the duty correction value by comparing the measurement counting value with the reference counting value.

### Claim 5

A duty cycle correction circuit comprising:
a data alignment circuit suitable for receiving unit pattern data into which at least one measurement data has been inserted in response to first and second strobe clock signals corresponding to a rising edge and falling edge of a strobe clock signal, respectively, and aligning the unit pattern data based on the first and second strobe clock signals, respectively;
a correction value generation circuit suitable for counting a section from time at which a duty measurement operation is entered to time at which charges for charging corresponding to the measurement data aligned by the first and second strobe clock signals, respectively, are stored by a preset value and outputting the counted section as a duty correction value; and
a clock generation circuit suitable for generating the first and second strobe clock signals and correcting duty ratios of the first and second strobe clock signals based on the duty correction value.

### Claim 6 (depends on 5)

The duty cycle correction circuit according to claim 5, further comprising a data generation circuit suitable for continuously generating the unit pattern data corresponding to the first and second strobe clock signals, respectively, during the duty measurement operation.

### Claim 7 (depends on 5)

The duty cycle correction circuit according to claim 5, wherein the correction value generation circuit comprises:
a first measurement value generation circuit suitable for generating a first measurement counting value based on up-driving data corresponding to the first strobe clock signal;
a second measurement value generation circuit suitable for generating a second measurement counting value based on down-driving data corresponding to the second strobe clock signal; and
a mean calculation circuit suitable for generating the duty correction value by analyzing a mean value of the first measurement counting value and the second measurement counting value.

### Claim 8 (depends on 7)

The duty cycle correction circuit according to claim 7, wherein each of the first and second measurement value generation circuits comprises:
an input circuit suitable for receiving the aligned measurement data and generating charging data in an enable section of an enable signal;
is a charging circuit suitable for storing the charges for charging corresponding to the charging data output by the input circuit;
a detection circuit suitable for detecting time at which the charges for charging stored in the charging circuit are stored by the preset value and controlling the enable signal; and
a counting circuit suitable for generating a corresponding measurement counting value by counting the aligned measurement data input during the enable section of the enable signal.

### Claim 9

A duty cycle correction circuit comprising:
a data alignment circuit suitable for continuously receiving unit pattern data into which at least one measurement data has been inserted, based on a plurality of strobe clock signals having different phases, respectively, and aligning the unit pattern data based on the plurality of strobe dock signals, respectively;
a correction value generation circuit suitable for counting a section from time at which a duty measurement operation is entered to time at which charges for charging corresponding to the measurement data aligned by the plurality of strobe clock signals, respectively, are stored by a preset value and outputting the counted section as a duty correction value; and
a clock generation circuit suitable for generating the plurality of strobe clock signals and correcting duty ratios of the plurality of strobe clock signals based on the duty correction value.

### Claim 10 (depends on 9)

The duty cycle correction circuit according to claim 9, wherein the plurality of strobe clock signals are sequentially enabled for a burst length operation.

### Claim 11 (depends on 9)

The duty cycle correction circuit according to claim 9, further comprising a data generation circuit suitable for continuously generating any of the unit pattern data corresponding to the plurality of strobe clock signals, respectively, based on a selection mode.

### Claim 12 (depends on 9)

The duty cycle correction circuit according to claim 9, wherein the clock generation circuit generates any one of the plurality of strobe dock signals based on a selection mode.

### Claim 13 (depends on 9)

The duty cycle correction circuit according to claim 9, wherein the correction value generation circuit comprises:
a measurement value generation circuit suitable for generating a measurement counting value for the aligned data corresponding to a corresponding strobe clock signal for duty measurement among the plurality of strobe clock signals;
a storage unit suitable for storing the measurement counting to values corresponding to each of the plurality of strobe clock signals based on a selection mode; and
a mean calculation circuit suitable for generating the duty correction value by analyzing a mean value of saved values stored in the storage unit.

### Claim 14 (depends on 13)

The duty cycle correction circuit according to claim 13, wherein the measurement value generation circuit comprises:
an input circuit suitable for receiving the aligned measurement data and generating charging data in an enable section of an enable signal;
a charging circuit suitable for storing the charges for charging corresponding to the charging data output by the input circuit;
a detection circuit suitable for detecting time at which the charges for charging stored in the charging circuit are stored by the preset value and controlling the enable signal; and
a counting circuit suitable for generating a corresponding measurement counting value by counting the aligned measurement data input during the enable section of the enable signal.

### Claim 15 (depends on 9)

The duty cycle correction circuit according to claim 9, wherein the selection mode selects a next strobe dock signal in a corresponding strobe clock signal based on the enable signal.

### Claim 16

A semiconductor system comprising:
a host device suitable for outputting a command signal and data and providing system clock information; and
a semiconductor device suitable for generating a strobe clock signal based on the system clock information, continuously receiving unit pattern data, into which at least one measurement data has been inserted and aligning the unit pattern data based on the strobe clock signal, upon a duty measurement operation, and generating a duty correction value for correcting a duty ratio of the strobe clock signal through a charging operation and a counting operation using the aligned measurement data.

### Claim 17 (depends on 16)

The semiconductor system according to claim 16, wherein the system clock information comprises clock frequency information used in the host device and clock count information used upon an alignment operation for input/output data.

### Claim 18 (depends on 17)

The semiconductor system according to claim 17, wherein the semiconductor device comprises:
a clock generation circuit suitable for generating the strobe dock signal based on the system clock information and correcting the duty ratio of the strobe clock signal based on the duty correction value;
a duty detection circuit suitable for generating the duty correction value through the charging operation and the counting operation using the aligned measurement data and providing the generated duty correction value to the clock generation circuit, during the duty measurement operation; and
a data input/output circuit suitable for inputting and outputting data based on the strobe clock signal upon normal operation.
