# US 11,121,704 B2 · Parallelling multiple power switches > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,121,704 B2 - Document ID: US11121704B2 - Status: Granted - Kind: B2 - Application number: 15/960,537 - Filed: 2018-04-23 - Published: 2019-10-24 - Granted: 2021-09-14 - Earliest claimed: 2018-04-23 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Cetin Kaya; Serkan Dusmez - Web page: https://patentgrep.com/patent/US11121704B2 ## CPC - H03K 3/011: Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature {(to maintain energy constant H03K3/015)} - H03K 3/017: Adjustment of width or dutycycle of pulses (pulse width modulation H03K7/08 {; to maintain energy constant H03K3/015}) - H03K 17/102: {in field-effect transistor switches} - H03K 17/122: {in field-effect transistor switches} - H03K 17/145: {in field-effect transistor switches} - H03K 5/00: Manipulating of pulses not covered by one of the other main groups of this subclass (circuits with regenerative action H03K3/00, H03K4/00; by the use of non-linear magnetic or dielectric devices H03K3/45) - H03K 2005/00013: {Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse} - H03K 2017/0806: {against excessive temperature} - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) ## Abstract In described examples, a first power switching circuit receives a power switching control signal and activates a first power switch in response to the power switching control signal. A second power switching circuit receives the power switching control, activates a second power switch in response to the power switching control signal, and determines a first power switching delay in response to temperature indications of the first and second power switches. The second power switching circuit activates the second power switch at a first delayed time after the activation of the first power switch, where the first delayed time follows the activation of the first power switch by the determined first power switching delay. ## Claims ### Claim 1 An apparatus, comprising: a first power switching circuit coupled to receive a power switching control signal and arranged to activate a first power switch in response to the power switching control signal; and a second power switching circuit coupled to receive the power switching control signal, arranged to activate a second power switch in response to the power switching control signal, and arranged to determine a first power switching delay in response to a temperature indication of the second switch and in response to a combined temperature indication of the first and second power switches, wherein the second power switching circuit is arranged to activate the second power switch at a first delayed time after the activation of the first power switch, and wherein the first delayed time follows the activation of the first power switch by the determined first power switching delay. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein the first power switching circuit is further arranged to determine a second power switching delay in response to a temperature indication of the first switch and in response to the combined temperature indication of the first and second power switches, wherein the first power switching circuit is arranged to activate the first power switch at a second delayed time after the activation of the second power switch, and wherein the second delayed time follows the activation of the second power switch by the determined second power switching delay. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the first and second power switching circuits are arranged on separate dies. ### Claim 4 (depends on 2) The apparatus of claim 2, wherein the temperature indication of the first power switch is generated in response to a temperature-dependent voltage generated in response to a temperature of the first power switch, and wherein the temperature indication of the second power switch is generated in response to a temperature-dependent voltage generated in response to a temperature of the second power switch. ### Claim 5 (depends on 2) The apparatus of claim 2, wherein the temperature indications of the first and second power switches are respectively first and second temperature indication currents, wherein the first and second temperature indication currents are summed to generate the combined temperature indication. ### Claim 6 (depends on 5) The apparatus of claim 5, wherein the first power switching circuit is coupled to a first differential amplifier that is arranged to control the second power switching delay in response to a amplifying a difference of the temperature indication of the first power switch and the combined temperature indication. ### Claim 7 (depends on 6) The apparatus of claim 6, wherein the second power switching circuit is coupled to a second differential amplifier that is arranged to control the first power switching delay in response to a amplifying a difference of the temperature indication of the second power switch and the combined temperature indication. ### Claim 8 (depends on 7) The apparatus of claim 7, wherein the second power switching circuit includes a capacitor for generating a delayed power switching control signal in response to the output of the second differential amplifier and in response to an assertion of the power switching control signal. ### Claim 9 (depends on 2) The apparatus of claim 2, wherein the power switching control signal is a high-side power switching control signal, and wherein the apparatus of claim 2 comprises: a third power switching coupled to receive a low-side power switching control signal, arranged to activate a third power switch in response to the power switching control signal, and arranged to determine a third power switching delay in response to a temperature indication of the third switch and in response to a combined temperature indication of the third and fourth power switches, wherein the third power switching circuit is arranged to activate the third power switch at a third delayed time after the activation of the third power switch, and wherein the third delayed time follows the activation of the third power switch by the determined third power switching delay; and a fourth power switching circuit coupled to receive the low-side power switching control signal, arranged to activate a fourth power switch in response to the power switching control signal, and arranged to determine a fourth power switching delay in response to a temperature indication of the fourth switch and in response to a combined temperature indication of the third and fourth power switches, wherein the fourth power switching circuit is arranged to activate the fourth power switch at a fourth delayed time after the activation of the fourth power switch, and wherein the fourth delayed time follows the activation of the fourth power switch by the determined fourth power switching delay. ### Claim 10 (depends on 9) The apparatus of claim 9, wherein drains of the first and second power switches and drains of the third and fourth power switches are coupled to a common switched node, wherein the sources of the first and second power switches are coupled to a high-side power supply rail, and wherein the sources of the third and fourth power switches are coupled to a low-side power supply rail. ### Claim 11 (depends on 10) The apparatus of claim 10, wherein the high-side power switching control signals are generated by a pulse-width modulator (PWM) coupled to the common switched mode. ### Claim 12 (depends on 11) The apparatus of claim 11, wherein the low-side power switching control signals are generated by the pulse-width modulator (PWM) coupled to the common switched mode. ### Claim 13 (depends on 11) The apparatus of claim 11, wherein the temperature indication of the first power switch is generated in response to integrating the temperature-dependent voltage generated in response to a temperature of a die of the first power switch, and wherein the temperature indication of the second power switch is generated in response to integrating the temperature-dependent voltage generated in response to a temperature of a die of the second power switch. ### Claim 14 A system, comprising: a first temperature sensing element thermally coupled to a first power switch and arranged to generate a temperature indication of the first power switch; a second temperature sensing element thermally coupled to a second power switch and arranged to generate a temperature indication of the second power switch; a first power switching circuit coupled to receive a power switching control signal and arranged to control the first power switch in response to the power switching signal; and a second power switching circuit coupled to receive the power switching control signal, coupled to receive the temperature indication of the second power switch, and arranged to generate a first power switching delay in response to the temperature indications of the first and second power switches, wherein the second power switch is activated in response to the first power switching delay, and wherein drains of the first and second power switches are coupled to a common switched node. ### Claim 15 (depends on 14) The system of claim 14, wherein the first power switching circuit is arranged to generate a second power switching delay in response to the temperature indications of the first and second power switches, and wherein the first power switch is activated in response to the second power switching delay. ### Claim 16 (depends on 15) The system of claim 15, comprising a pulse-width modulator circuit arranged to generate the power switching control signal in response to a voltage generated at the common switched node. ### Claim 17 A method, comprising: generating a first temperature indication in response to a temperature of a first power switch; generating a second temperature indication in response to a temperature of a second power switch; receiving a power switching control signal for activating the first and second power switches; delaying the received power switching control signal in response to the temperature indications of the first and second power switches; and activating the second power switch in response to the delayed power switching control signal. ### Claim 18 (depends on 17) The method of claim 17, wherein the first power switch is on a first die, and wherein the second power switch is on a second die. ### Claim 19 (depends on 18) The method of claim 18, further comprising summing respective currents generated in response to the first and second temperature indications, wherein the respective currents generated in response to the first and second temperature indications are summed at a node common to the first and second dies, wherein the respective currents generated in response to the first and second temperature indications are summed to generate an average temperature indication, and wherein the received power switching control signal is delayed in response to the average temperature indication.