# US 11,121,681 B2 · Bias circuitry > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,121,681 B2 - Document ID: US11121681B2 - Status: Granted - Kind: B2 - Application number: 16/835,575 - Filed: 2020-03-31 - Published: 2020-11-05 - Granted: 2021-09-14 - Earliest claimed: 2019-05-03 - Assignees: Qorvo International PTE. LTD. - Applicants: Qorvo International PTE. LTD. - Inventors: Michael Nielsen - Web page: https://patentgrep.com/patent/US11121681B2 ## CPC - H03F 3/195: in integrated circuits - H03F 1/0216: {Continuous control} - H03F 1/0261: {with control of the polarisation voltage or current, e.g. gliding Class A} - H03F 1/302: {in bipolar transistor amplifiers (H03F1/303, H03F1/305, H03F1/307 take precedence)} - H03F 1/52: Circuit arrangements for protecting such amplifiers {(monitoring arrangements G01R31/28; increasing reliability in communication systems, e.g. using redundancy H04B1/74)} - H03F 1/56: Modifications of input or output impedances, not otherwise provided for - H03F 1/565: {using inductive elements} - H03F 3/245: {with semiconductor devices only} - H03F 2200/18: the bias of the gate of a FET being controlled by a control signal - H03F 2200/222: A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier - H03F 2200/387: A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier - H03F 2200/411: the output amplifying stage of an amplifier comprising two power stages - H03F 2200/451: the amplifier being a radio frequency amplifier - H03F 2200/555: A voltage generating circuit being realised for biasing different circuit elements - H03F: AMPLIFIERS ## Abstract Bias circuitry is disclosed with a bias drive device having a first current terminal coupled to a voltage supply node, a bias control terminal coupled to a control node, and a second current terminal coupled to a bias output node. An impedance control device has a third current terminal and an impedance control terminal that are coupled together and a fourth current terminal coupled to ground. An output impedance resistor is coupled between the third current terminal and the bias output node. A pull-down device is coupled between the bias output node and the fixed voltage node, wherein a higher voltage applied to the control node sets an output impedance at the bias output node to approximately a lower impedance of the pull-down device and a lower voltage applied to the control node sets the output impedance to approximately the resistance of the output impedance resistor. ## Claims ### Claim 1 Bias circuitry comprising: a bias drive device having a first current terminal coupled to a first voltage supply node, a bias control terminal coupled to a control node, and a second current terminal coupled to a bias output node; an impedance control device having a third current terminal and an impedance control terminal that are coupled together and a fourth current terminal coupled to a fixed voltage node; an output impedance resistor coupled between the third current terminal and the bias output node; and a pull-down device coupled between the bias output node and the fixed voltage node, wherein a higher voltage applied to the control node sets an output impedance at the bias output node to approximately equal to a lower impedance of the pull-down device in parallel with the bias drive device and a lower voltage applied to the control node sets the output impedance at the bias output node to approximately equal to resistance of the output impedance resistor. ### Claim 2 (depends on 1) The bias circuitry of claim 1 further including an impedance setpoint resistor coupled between the impedance control terminal and the control node. ### Claim 3 (depends on 1) The bias circuitry of claim 1 further including a current limiter coupled between an external control terminal and the control node. ### Claim 4 (depends on 1) The bias circuitry of claim 1 further including a voltage reference coupled between the control node and the fixed voltage node. ### Claim 5 (depends on 4) The bias circuitry of claim 4 wherein the fixed voltage node is ground. ### Claim 6 (depends on 4) The bias circuitry of claim 4 wherein the voltage reference comprises at least one diode. ### Claim 7 (depends on 6) The bias circuitry of claim 6 wherein the at least one diode is a bipolar junction transistor coupled in a diode configuration. ### Claim 8 (depends on 1) The bias circuitry of claim 1 wherein the pull-down device is a bipolar junction transistor coupled in a diode configuration. ### Claim 9 (depends on 1) The bias circuitry of claim 1 wherein the bias drive device is a bipolar junction transistor having a collector coupled to the first current terminal, a base coupled to the bias control terminal, and an emitter coupled to the second current terminal. ### Claim 10 (depends on 1) The bias circuitry of claim 1 wherein the impedance control device is a bipolar junction transistor having a collector coupled to the third current terminal, a base coupled to the impedance control terminal, and an emitter coupled to the fourth current terminal. ### Claim 11 (depends on 1) The bias circuitry of claim 1 wherein the lower impedance of the pull-down device is between 1Ω and 10Ω. ### Claim 12 (depends on 11) The bias circuitry of claim 11 wherein resistance of the output impedance resistor is between 200% and 1000% greater than the lower impedance of the pull-down device. ### Claim 13 A radio frequency amplifier system comprising: a power transistor having an amplifier control terminal coupled to a bias output node; and bias circuitry comprising: a bias drive device having a first current terminal coupled to a first voltage supply node, a bias control terminal coupled to a control node, and a second current terminal coupled to the bias output node; an impedance control device having a third current terminal and an impedance control terminal that are coupled together and a fourth current terminal coupled to a fixed voltage node; an output impedance resistor coupled between the third current terminal and the bias output node; and a pull-down device coupled between the bias output node and the fixed voltage node, wherein a higher voltage applied to the control node sets an output impedance at the bias output node to approximately equal to a lower impedance of the pull-down device in parallel with the bias drive device and a lower voltage applied to the control node sets the output impedance at the bias output node to approximately equal to resistance of the output impedance resistor. ### Claim 14 (depends on 13) The radio frequency amplifier system of claim 13 further including an impedance setpoint resistor coupled between the impedance control terminal and the control node. ### Claim 15 (depends on 13) The radio frequency amplifier system of claim 13 further including a voltage reference coupled between the control node and ground. ### Claim 16 (depends on 13) The radio frequency amplifier system of claim 13 further including a current limiter coupled between an external control terminal and the control node. ### Claim 17 (depends on 16) The radio frequency amplifier system of claim 16 further including a digital-to-analog converter having a converter output coupled to the external control terminal. ### Claim 18 (depends on 13) The radio frequency amplifier system of claim 13 wherein the power transistor and the bias circuitry are integrated within a circuit die. ### Claim 19 (depends on 18) The radio frequency amplifier system of claim 18 wherein the circuit die has dimensions that are less than 600×810 microns. ### Claim 20 (depends on 18) The radio frequency amplifier system of claim 18 wherein the circuit die is fabricated with gallium arsenide technology.