# US 11,121,632 B2 · Advanced constant off-time control for four-switch buck-boost converter > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,121,632 B2 - Document ID: US11121632B2 - Status: Granted - Kind: B2 - Application number: 16/747,781 - Filed: 2020-01-21 - Published: 2020-05-21 - Granted: 2021-09-14 - Earliest claimed: 2018-03-28 - Assignees: M3 Technology Inc. - Applicants: M3 Technology Inc. - Inventors: Bo Yang; Xiaoyu Xi; David Meng - Web page: https://patentgrep.com/patent/US11121632B2 ## CPC - H02M 3/1582: {Buck-boost converters (H02M3/1584 takes precedence)} - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - H02M 1/088: for the simultaneous control of series or parallel connected semiconductor devices - H02M 3/157: with digital control - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract A buck-boost converter comprises generating a first ramp using a first current source having a current level proportional to an input voltage of a buck-boost converter, and a second ramp using a second current source having a current level proportional to an output voltage of the buck-boost converter, generating a first threshold voltage proportional to a difference between the input voltage and the output voltage of the buck-boost converter, and a second threshold voltage proportional to the input voltage of the buck-boost converter, terminating a gate drive signal of a first low-side switch of the buck-boost converter based upon comparing the first threshold voltage and the first ramp, and terminating a gate drive signal of a second high-side switch of the buck-boost converter based upon comparing the second threshold voltage and the second ramp. ## Claims ### Claim 1 An apparatus comprising: a buck-boost converter comprising a buck portion and a boost portion connected in cascade; and a controller comprising a first timer and a second timer, wherein: the first timer is configured to determine a turn-off time of a high-side switch of the buck portion, and wherein the high-side switch of the buck portion remains off during the turn-off time of the high-side switch of the buck portion, and wherein the first timer determines the turn-off time of the high-side switch of the buck portion based on a comparison between a first signal and a second signal, and wherein the first signal is proportional to a difference between an input voltage and an output voltage of the buck-boost converter, and the second signal is generated based on a signal proportional to the input voltage of the buck-boost converter; and the second timer is configured to determine a turn-off time of a low-side switch of the boost portion, and wherein the low-side switch of the boost portion remains off during the turn-off time of the low-side switch of the boost portion. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein: the second timer determines the turn-off time of the low-side switch of the boost portion based on a comparison between a third signal and a fourth signal, and wherein the third signal is proportional to the input voltage of the buck-boost converter, and the fourth signal is generated based on a signal proportional to the output voltage of the buck-boost converter. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein the second timer comprises: a second current source having a current level proportional to the output voltage of the buck-boost converter; and a second capacitor and a second switch connected in parallel, wherein the second current source is configured to charge the second capacitor, and the second switch is configured to reset the second capacitor. ### Claim 4 (depends on 3) The apparatus of claim 3, further comprising: a second bias source connected in series with the second capacitor, wherein the fourth signal is equal to a difference between a voltage across the second capacitor and an output voltage of the second bias source. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein the first timer comprises: a first current source having a current level proportional to the input voltage of the buck-boost converter; and a first capacitor and a first switch connected in parallel, wherein the first current source is configured to charge the first capacitor, and the first switch is configured to reset the first capacitor. ### Claim 6 (depends on 5) The apparatus of claim 5, further comprising: a first bias source connected in series with the first capacitor, wherein the second signal is equal to a sum of a voltage across the first capacitor and an output voltage of the first bias source. ### Claim 7 (depends on 1) The apparatus of claim 1, further comprising: a comparator having a first input configured to receive a current signal representing a current flowing through the buck-boost converter, and a second input configured to receive an error voltage signal generated by comparing the output voltage of the buck-boost converter with a predetermined reference. ### Claim 8 (depends on 7) The apparatus of claim 7, wherein: the current signal is generated by a dc resistance (DCR) current sensing device. ### Claim 9 An apparatus comprising: a buck-boost converter comprising a first high-side switch and a first low-side switch connected in series between two input terminals of the buck-boost converter, a second high-side switch and a second low-side switch connected in series between two output terminals of the buck-boost converter, and an inductor connected between a common node of the first high-side switch and the first low-side switch, and a common node of the second high-side switch and the second low-side switch; and a controller comprising a first timer and a second timer, wherein the first timer is configured to determine a turn-off time of the first high-side switch, and wherein the first high-side switch remains off during the turn-off time of the first high-side switch, and the second timer is configured to determine a turn-off time of the second low-side switch, and wherein the second low-side switch remains off during the turn-off time of the second low-side switch, and wherein the second timer determines the turn-off time of the second low-side switch based on a comparison between a first signal and a second signal, and wherein the first signal is proportional to an input voltage of the buck-boost converter, and the second signal is generated based on a signal proportional to an output voltage of the buck-boost converter. ### Claim 10 (depends on 9) The apparatus of claim 9, wherein: the first timer determines the turn-off time of the first high-side switch based on a comparison between a third signal and a fourth signal, and wherein the third signal is proportional to a voltage difference between the input voltage and the output voltage of the buck-boost converter, and the second signal is generated based on a signal proportional to the input voltage of the buck-boost converter. ### Claim 11 (depends on 9) The apparatus of claim 9, further comprising: a comparator having a first input configured to receive a current signal representing a current flowing through the buck-boost converter, and a second input configured to receive an error voltage signal. ### Claim 12 (depends on 11) The apparatus of claim 11, wherein: an output signal of the comparator determines a turn-on time of the first high-side switch and a turn-on time of the second low-side switch. ### Claim 13 (depends on 11) The apparatus of claim 11, wherein: the error voltage signal is generated by an error amplifier having a first input configured to receive a predetermined reference and a second input configured to detect a voltage signal proportional to the output voltage of the buck-boost converter. ### Claim 14 A method comprising: generating a first ramp using a first current source having a current level proportional to an input voltage of a buck-boost converter, and a second ramp using a second current source having a current level proportional to an output voltage of the buck-boost converter; generating a first threshold voltage proportional to a voltage difference between the input voltage and the output voltage of the buck-boost converter, and a second threshold voltage proportional to the input voltage of the buck-boost converter; terminating a gate drive signal of a first low-side switch of the buck-boost converter based upon comparing the first ramp with the first threshold voltage; and terminating a gate drive signal of a second high-side switch of the buck-boost converter based upon comparing the second ramp with the second threshold voltage. ### Claim 15 (depends on 14) The method of claim 14, wherein the buck-boost converter comprises: a first high-side switch and the first low-side switch connected in series between two input terminals of the buck-boost converter; the second high-side switch and a second low-side switch connected in series between two output terminals of the buck-boost converter; and an inductor connected between a common node of the first high-side switch and the first low-side switch, and a common node of the second high-side switch and the second low-side switch. ### Claim 16 (depends on 14) The method of claim 14, further comprising: comparing the first threshold voltage with a sum of the first ramp and a first predetermined bias voltage to generate a termination signal for turning off the first low-side switch of the buck-boost converter; and comparing the second threshold voltage with a voltage difference between the second ramp and a second predetermined bias voltage to generate a termination signal for turning off the second high-side switch of the buck-boost converter. ### Claim 17 (depends on 16) The method of claim 16, further comprising: configuring the buck-boost converter to operate in a buck mode, a buck-boost mode and a boost mode based on a plurality of operation conditions. ### Claim 18 (depends on 17) The method of claim 17, further comprising: configuring the buck-boost converter to have automatic transitions among the buck mode, the buck-boost mode and the boost mode through adjusting the first predetermined bias voltage and the second predetermined bias voltage. ### Claim 19 (depends on 14) The method of claim 14, further comprising: determining an on-time of a first high-side switch and an on-time of a second low-side switch of the buck-boost converter based upon comparing a current signal representing a current flowing through the buck-boost converter and an output signal of an error amplifier. ### Claim 20 (depends on 19) The method of claim 19, wherein: a first input of the error amplifier configured to receive a predetermined reference; and a second input of the error amplifier is configured to detect a voltage signal proportional to the output voltage of the buck-boost converter.