# US 11,121,626 B2 · Switching frequency control apparatus and control method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,121,626 B2 - Document ID: US11121626B2 - Status: Granted - Kind: B2 - Application number: 16/578,758 - Filed: 2019-09-23 - Published: 2020-01-16 - Granted: 2021-09-14 - Earliest claimed: 2018-05-16 - Assignees: M3 Technology Inc. - Applicants: M3 Technology Inc. - Inventors: Xiaoyu Xi; Bo Yang; Lou Nuo - Web page: https://patentgrep.com/patent/US11121626B2 ## CPC - H02M 3/156: with automatic control of output voltage or current, e.g. switching regulators - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - H02M 3/157: with digital control - H02M 3/158: including plural semiconductor devices as final control devices for a single load - H02M 1/0025: {Arrangements for modifying reference values, feedback values or error values in the control loop of a converter} - H02M 1/44: Circuits or arrangements for compensating for electromagnetic interference in converters or inverters - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract A switch frequency control apparatus comprises a timer configured to receive a ramp and a threshold voltage, and generate a control signal for setting gate drive signals of a power converter, a ramp generator configured to generate the ramp through charging a ramp capacitor using a current source having a current level equal to a bias voltage divided by a resistor, and a threshold generator configured to generate the threshold voltage proportional to the bias voltage. ## Claims ### Claim 1 An apparatus comprising: a timer configured to receive a ramp and a threshold voltage, and generate a control signal for setting gate drive signals of a power converter; a ramp generator configured to generate the ramp through charging a ramp capacitor using a current source having a current level equal to a bias voltage divided by a resistor, wherein the bias voltage is a substantially constant voltage; and a threshold generator configured to generate the threshold voltage proportional to the bias voltage, wherein in determining a switching period of the power converter, the bias voltage for generating the ramp and the bias voltage for generating the threshold voltage cancel each other out, thereby maintaining the switching period of the power converter constant. ### Claim 2 (depends on 1) The apparatus of claim 1, wherein: the power converter is a boost power converter; the control signal is for setting an off-time of the boost power converter; and the threshold voltage is proportional to one minus a duty cycle of the boost power converter. ### Claim 3 (depends on 2) The apparatus of claim 2, wherein: the off-time of the boost power converter is a turn-off time of a low-side switch of the boost power converter, and the off-time of the boost power converter is proportional to one minus the duty cycle of the boost power converter. ### Claim 4 (depends on 2) The apparatus of claim 2, wherein: a switching frequency of the boost power converter is determined by a capacitance value of the ramp capacitor and a resistance value of the resistor. ### Claim 5 (depends on 1) The apparatus of claim 1, wherein: the power converter is a buck power converter; the control signal is for setting an on-time of the buck power converter; and the threshold voltage is proportional to a duty cycle of the buck power converter. ### Claim 6 (depends on 5) The apparatus of claim 5, wherein: the on-time of the buck power converter is a turn-on time of a high-side switch of the buck power converter, and the on-time of the buck power converter is proportional to the duty cycle of the buck power converter. ### Claim 7 (depends on 5) The apparatus of claim 5, wherein: a switching frequency of the buck power converter is determined by a capacitance value of the ramp capacitor and a resistance value of the resistor. ### Claim 8 (depends on 1) The apparatus of claim 1, wherein the threshold generator comprises a first switch and a second switch connected in series between the bias voltage and ground, and a filtering circuit connected to a common node of the first switch and the second switch, and wherein the threshold voltage is generated at an output of the filtering circuit, and wherein the filtering circuit comprises a resistor divider, a control switch and a capacitor, and wherein the resistor divider and the control switch are connected in series between the common node of the first switch and the second switch, and ground, and wherein the capacitor is between the output of the filtering circuit and ground. ### Claim 9 A converter comprising: a high-side switch and a low-side switch connected in series between an input terminal of a power converter and ground; an inductor connected to a common node of the high-side switch and the low-side switch, and an output terminal of the power converter; and a control apparatus configured to generate gate drive signals for the high-side switch and the low-side switch, wherein the control apparatus comprises a timer configured to receive a ramp generated by charging a ramp capacitor through a current source and a threshold voltage, and generate a control signal for setting a turn-on time of the high-side switch based on a comparison between the ramp and the threshold voltage, wherein both a current level of the current source and the threshold voltage are proportional to a bias voltage of the power converter, and wherein the bias voltage of the power converter is a substantially constant voltage, and wherein as a result of having both the current level of the current source and the threshold voltage proportional to the bias voltage, the a switching period of the power converter is maintained constant. ### Claim 10 (depends on 9) The converter of claim 9, wherein: the threshold voltage is proportional to a duty cycle of the power converter. ### Claim 11 (depends on 9) The converter of claim 9, wherein: the power converter is a step-down power converter employing a constant on-time control scheme, and wherein when the step-down power converter is configured to operate at a constant switching frequency. ### Claim 12 (depends on 9) The converter of claim 9, wherein the threshold voltage is generated by a threshold voltage generator comprising a first switch and a second switch connected in series between the bias voltage and ground, and a filtering circuit connected to a common node of the first switch and the second switch, and wherein the threshold voltage is generated at an output of the filtering circuit, and wherein the first switch is configured to operate in sync with the high-side switch of the power converter, and the second switch is configured to operate in sync with the low-side switch of the power converter. ### Claim 13 (depends on 12) The converter of claim 12, wherein: the filtering circuit comprises a first divider resistor, a second divider resistor, a control switch and a capacitor, and wherein the first divider resistor, the second divider resistor and the control switch are connected in series between the common node of the first switch and the second switch, and ground, and wherein the capacitor is between a common node of the first divider resistor and the second divider resistor, and ground. ### Claim 14 (depends on 13) The converter of claim 13, further comprising: a plurality of filter stages connected to the common node of the first divider resistor and the second divider resistor, each filter stage of the plurality of filter stages comprising a filter resistor and a filter capacitor connected in series. ### Claim 15 A converter comprising: a high-side switch and a low-side switch connected in series between an output terminal of a power converter and ground; an inductor connected to an input terminal of the power converter, and a common node of the high-side switch and the low-side switch; and a control apparatus configured to generate gate drive signals for the high-side switch and the low-side switch, wherein the control apparatus comprises a timer configured to receive a ramp generated by charging a ramp capacitor through a current source and a threshold voltage, and generate a control signal for setting a turn-off time of the low-side switch based on a comparison between the ramp and the threshold voltage, wherein both a current level of the current source and the threshold voltage are proportional to a bias voltage of the power converter, wherein the bias voltage of the power converter is a substantially constant voltage, and wherein in determining a switching period of the power converter, the bias voltage for generating the ramp and the bias voltage for generating the threshold voltage cancel each other out, and as a result of eliminating the bias voltage as a variable in determining the switching period of the power converter, the switching period of the power converter is maintained constant. ### Claim 16 (depends on 15) The converter of claim 15, wherein: the power converter is a step-up converter employing a constant off-time control scheme. ### Claim 17 (depends on 16) The converter of claim 16, wherein: the threshold voltage is proportional to one minus a duty cycle of the step-up converter. ### Claim 18 (depends on 16) The converter of claim 16, wherein: the power converter is configured to operate at a constant switching frequency in the steady state. ### Claim 19 (depends on 18) The converter of claim 18, wherein: the current level of the constant current source is equal to the bias voltage divided by a resistor. ### Claim 20 (depends on 19) The converter of claim 19, wherein: the constant switching frequency is determined by a capacitance value of the ramp capacitor and a resistance value of the resistor.