# US 11,115,060 B2 · Parallel bit interleaver

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- Number: US 11,115,060 B2
- Document ID: US11115060B2
- Status: Granted
- Kind: B2
- Application number: 16/559,970
- Filed: 2019-09-04
- Published: 2019-12-26
- Granted: 2021-09-07
- Earliest claimed: 2011-05-18
- Assignees: Panasonic Corporation
- Applicants: Panasonic Corporation
- Inventors: Mihail Petrov
- Web page: https://patentgrep.com/patent/US11115060B2

## CPC

- H03M 13/2792: {Interleaver wherein interleaving is performed jointly with another technique such as puncturing, multiplexing or routing}
- H03M 13/116: {Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices}
- H03M 13/1165: {QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]}
- H03M 13/1168: {wherein the sub-matrices have column and row weights greater than one, e.g. multi-diagonal sub-matrices}
- H03M 13/255: {with Low Density Parity Check [LDPC] codes}
- H03M 13/27: using interleaving techniques
- H03M 13/2707: {Simple row-column interleaver, i.e. pure block interleaving}
- H03M 13/271: {Row-column interleaver with permutations, e.g. block interleaving with inter-row, inter-column, intra-row or intra-column permutations}
- H03M 13/2778: {Interleaver using block-wise interleaving, e.g. the interleaving matrix is sub-divided into sub-matrices and the permutation is performed in blocks of sub-matrices}
- H03M 13/2957: {Turbo codes and decoding}
- H03M 13/356: {Unequal error protection [UEP]}
- H03M 13/6325: {Error control coding in combination with demodulation}
- H03M 13/6552: {DVB-T2}
- H03M 13/6555: {DVB-C2}
- H04L 1/0058: {Block-coded modulation}
- H04L 1/0606: {Space-frequency coding}
- H04L 1/0618: {Space-time coding}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

A bit interleaving method involves applying a bit permutation process to bits of a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N′/M folding sections (N′ being a subset of N selected cyclic blocks and being a multiple of M/F), each of the constellation words being associated with one of the F×N′/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.

## Claims

### Claim 1

A bit interleaving method for interleaving bits of a codeword generated based on a low-density parity check coding scheme, a parity-check matrix of the low-density parity check coding scheme having a quasi-cyclic structure, the bit interleaving method comprising:
applying a bit permutation process to the codeword made up of N cyclic blocks each consisting of Q bits, to reorder the bits of the codeword in accordance with a bit permutation rule defining a reordering of the bits;
dividing the codeword after the bit permutation process into a plurality of constellation words, each of the constellation words being made up of M bits; and
mapping each of the constellation words onto a modulated signal, wherein
N is not a multiple of M,
the bit permutation rule is a rule for applying column-row permutation of writing the Q bits in each of N′=N−X cyclic blocks of the N cyclic blocks in a row direction to a row among M rows of a matrix and reading in a column direction, where X is a remainder of N divided by M, and
X cyclic blocks include a cyclic block in a parity section of the codeword.

### Claim 2

A signal processing method for processing a signal transmitted by modulating N×Q/M constellation words, the constellation words being generated by applying a bit reordering process to a codeword generated based on a low-density parity check coding scheme, a parity-check matrix of the low-density parity check coding scheme having a quasi-cyclic structure, and dividing bits of the codeword for each M bits, the codeword being made up of N cyclic blocks each including Q bits,
the bit reordering process comprising
a bit permutation process of reordering the bits of the codeword in accordance with a bit permutation rule defining a reordering of the bits, wherein
N is not a multiple of M,
the bit permutation rule is a rule for applying column-row permutation of writing the Q bits in each of N′=N−X cyclic blocks of the N cyclic blocks in a row direction to a row among M rows of a matrix and reading in a column direction, where X is a remainder of N divided by M, and
X cyclic blocks include a cyclic block in a parity section of the codeword,
the signal processing method comprising:
a demodulating step of generating a demodulated signal by demodulating the signal, which has been transmitted by mapping the N×Q/M constellation words; and
a decoding step of decoding the demodulated signal in accordance with the bit permutation rule to generate data before coding according to the quasi-cyclic low-density parity check coding scheme.

### Claim 3

A bit interleaving method for interleaving bits of a codeword generated by coding, the bit interleaving method comprising:
applying a bit permutation process to the codeword made up of N cyclic blocks each consisting of Q bits, to reorder the bits of the codeword; and
dividing the codeword after the bit permutation process into a plurality of constellation words, each of the constellation words being made up of M bits, wherein
N is not a multiple of M, and
the bit permutation rule is a rule for applying column-row permutation of writing the Q bits in each of N′=N−X cyclic blocks of the N cyclic blocks in a row direction to a row among M rows of a matrix and reading in a column direction, where X is a remainder of N divided by M.

### Claim 4 (depends on 3)

The bit interleaving method according to claim 3, wherein the codeword is generated according to a quasi-cyclic low-density parity check coding scheme.