# US 11,115,058 B2 · Coding device, transmitter, decoding device, and receiver

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- Number: US 11,115,058 B2
- Document ID: US11115058B2
- Status: Granted
- Kind: B2
- Application number: 16/648,841
- Filed: 2017-09-27
- Published: 2020-08-20
- Granted: 2021-09-07
- Earliest claimed: 2017-09-27
- Assignees: Mitsubishi Electric Corporation
- Applicants: Mitsubishi Electric Corporation
- Inventors: Hideo Yoshida; Shinya Hirakuri; Toshiyuki Kuze
- Web page: https://patentgrep.com/patent/US11115058B2

## CPC

- H03M 13/1575: {Direct decoding, e.g. by a direct determination of the error locator polynomial from syndromes and subsequent analysis or by matrix operations involving syndromes, e.g. for codes with a small minimum Hamming distance}
- H03M 13/1102: {Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes}
- H03M 13/152: {Bose-Chaudhuri-Hocquenghem [BCH] codes}
- H03M 13/253: {with concatenated codes}
- H03M 13/255: {with Low Density Parity Check [LDPC] codes}
- H03M 13/2906: {using block codes (H03M13/2957 takes precedence)}
- H03M 13/2909: {Product codes}
- H03M 13/2921: {wherein error correction coding involves a diagonal direction}
- H03M 13/2945: {using at least three error correction codes (H03M13/2957 takes precedence)}
- H03M 13/6522: {Intended application, e.g. transmission or communication standard}
- H03M 13/6552: {DVB-T2}
- H03M 13/6561: {Parallelized implementations}
- H03M 13/1165: {QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]}
- H03M 13/1515: {Reed-Solomon codes}
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

In a coding device (20), a first coding unit (21) generates a parity of an RS code by coding, based on the RS code, each first data sequence existing in a direction different from a row direction of input data, and generates coded data by attaching the parity of the RS code to each first data sequence, thereby consequently expanding a matrix. A second coding unit (22) generates a parity of a BCH code and a parity of an LDPC code by coding, based on the BCH code and the LDPC code, each second data sequence existing in a row direction of the coded data, and generates a plurality of DVB-S2 frames (13) including, per DVB-S2 frame (13), one data sequence existing in the row direction of the coded data, the corresponding parity of the BCH code, and the corresponding parity of the LDPC code.

## Claims

### Claim 1

A coding device comprising:
processing circuitry configured to:
generate a parity of a first error-correcting code by coding, based on the first error-correcting code, each first data sequence existing in a direction different from a row direction of input data regarded as one matrix, and generate coded data by attaching the parity of the first error-correcting code to each first data sequence, thereby consequently expanding the matrix;
generate a parity of a second error-correcting code by coding, based on the second error-correcting code, each second data sequence existing in a row direction of the generated coded data, and generate a plurality of frames including, per frame, one data sequence existing in the row direction of the coded data, and a corresponding parity of the second error-correcting code; and
insert an identifier for identifying a top of the coded data in a first row of the coded data.

### Claim 2 (depends on 1)

The coding device according to claim 1,
wherein a data element existing in each row of each first data sequence has a data length of one symbol or less.

### Claim 3 (depends on 1)

The coding device according to claim 1,
wherein each first data sequence exists in a column direction of the input data, and
wherein the processing circuitry is further configured to generate the coded data and consequently expand the matrix in the column direction.

### Claim 4 (depends on 1)

The coding device according to claim 1,
wherein inserting the identifier for identifying the top of the coded data in the first row of the coded data shifts the matrix, and
wherein each second data sequence exists in the row direction of the generated coded data in which the identifier is inserted.

### Claim 5 (depends on 1)

The coding device according to claim 1,
wherein the processing circuitry is further configured to insert, in a header field of each frame, an identifier for identifying whether the top of the coded data in the first row of the coded data is included in each frame.

### Claim 6 (depends on 1)

The coding device according to claim 1,
wherein the processing circuitry is further configured to insert identifiers for discriminating the top of the coded data in the first row of the coded data and a portion of the coded data other than the top, in a top of each row of the coded data, and
wherein each second data sequence exists in the row direction of the generated coded data in which the identifiers are inserted.

### Claim 7 (depends on 1)

The coding device according to claim 1,
wherein the processing circuitry is further configured to generate the parity of the first error-correcting code by coding, based on the first error-correcting code, the first data sequences which are in a quantity that matches a length of a user data field of one frame, and insert each data sequence existing in the row direction of the coded data, in a user data field of each frame.

### Claim 8 (depends on 1)

The coding device according to claim 1,
wherein the processing circuitry is further configured to generate the parity of the first error-correcting code by coding, based on the first error-correcting code, the first data sequences which are in a quantity larger than a quantity that matches a length of a user data field of one frame, insert each data sequence existing in the row direction of the coded data, in a user data field of each frame, and fill a remaining portion of the user data field of each frame with a padding.

### Claim 9 (depends on 1)

The coding device according to claim 1,
wherein each first data sequence exists in an oblique direction of the input data, and
wherein the processing circuitry is further configured to generate the parity of the first error-correcting code by coding, based on the first error-correcting code, the first data sequences which are in a quantity that matches a length of each first data sequence, and generate the coded data by attaching the parity of the first error-correcting code to each first data sequence, thereby consequently expanding the matrix in the oblique direction.

### Claim 10 (depends on 1)

The coding device according to claim 1,
wherein the processing circuitry is further configured to generate, as the parity of the first error-correcting code, parities of a plurality of symbols.

### Claim 11 (depends on 1)

The coding device according to claim 1,
wherein the first error-correcting code is an RS code or an extended RS code.

### Claim 12 (depends on 1)

The coding device according to claim 1,
wherein the second error-correcting code is a concatenated code.

### Claim 13 (depends on 1)

A transmitter comprising
the coding device according to claim 1,
wherein the transmitter transmits the plurality of frames obtained from the coding device to an outside.

### Claim 14

A decoding device comprising:
processing circuitry configured to:
detect an identifier that identifies a top of a coded data in a first row of the coded data;
obtain, based on the identifier, a plurality of frames including, per frame, one data sequence existing in a row direction of the coded data regarded as one matrix, and a corresponding parity of a second error-correcting code, and perform error correction on each second data sequence existing in the row direction of the coded data, using the parity of the second error-correcting code; and
obtain a parity of a first error-correcting code attached to each first data sequence existing in a direction different from the row direction of the coded data on which error correction has been done, and perform error correction on each first data sequence using the parity of the first error-correcting code.

### Claim 15 (depends on 14)

The decoding device according to claim 14,
wherein the processing circuitry is further configured to perform, as error correction using the parity of the first error-correcting code, erasure correction on each first data sequence based on a result of performed error correction.

### Claim 16 (depends on 14)

A receiver comprising
the decoding device according to claim 14,
wherein the receiver receives the plurality of frames from an outside and supplying the plurality of frames to the decoding device.

### Claim 17 (depends on 1)

The coding device according to claim 1,
wherein the identifier is an attached synchronization marker (ASM).