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US 11,115,040 B1Granted
ADC slicer reconfiguration for different channel insertion loss
AssigneeeTopus Technology Inc.
InventorDanfeng Xu
Life of this patent
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Abstract
A receiver having analog-to-digital converters (ADC) is disclosed. The ADCs may be reconfigured based on the insertion loss mode of the receiver. For example, different portions of a plurality of time-interleaved successive approximation (SAR) ADC slices included in at least one sub-ADC of each time-interleaved ADC may be enabled depending on which of a plurality of insertion loss modes is selected for operation of the receiver.
Claims20
A receiver comprising:
- a clock generator including a plurality of clock signal generators that generate a plurality of sampling clock signals having a plurality of sampling phases, each of the plurality of sampling clock signals having a corresponding one of the plurality of sampling phases;
- and
- a plurality of time-interleaved analog-to-digital converters (ADC) that each sample an analog input signal at a corresponding one of the plurality of sampling phases to convert the analog signal into a digital sample, each of the plurality of time-interleaved ADCs including a plurality of sub-ADCs;
- wherein each of the plurality of sub-ADCs of at least one of the plurality of time-interleaved ADCs includes a plurality of time-interleaved successive approximation (SAR) ADC slices that sample the analog input signal at a data rate of the receiver;
- wherein responsive to the receiver being configured to operate at a first insertion loss mode from a plurality of insertion loss modes, a first set of the plurality of SAR ADC slices of at least one of the plurality of sub-ADCs is enabled to sample the analog input signal at the data rate of the receiver to generate the digital sample, wherein during the first insertion loss mode the receiver is configured to convert the analog signal into the digital sample such that the digital sample has a first insertion loss during the first insertion loss mode;
- and
- wherein responsive to the receiver being configured to operate at a second insertion loss mode from the plurality of insertion loss modes that is different from the first insertion loss mode, a second set of the plurality of SAR ADC slices of the at least one of the plurality of sub-ADCs is enabled to sample the analog input signal at the data rate of the receiver to generate the digital sample, wherein during the second insertion loss mode the receiver is configured to convert the analog signal into the digital sample such that the digital sample has a second insertion loss during the second insertion loss mode and the second insertion loss is different from the first insertion loss, the second set of the plurality of SAR ADC slices including a second amount of SAR ADC slices that is different from a first amount of SAR ADC slices included in the first set of the plurality of SAR ADC slices.
4 more elements
A method of a receiver that includes a clock generator and a plurality of time-interleaved analog-to-digital converters (ADC) comprising a plurality of sub-ADCs that each include a plurality of time-interleaved successive approximation (SAR) ADC slices that sample the analog input signal at a data rate of the receiver, the method comprising:
- generating a plurality of sampling clock signals having a plurality of sampling phases, each of the plurality of sampling clock signals having a corresponding one of the plurality of sampling phases;
- and
- sampling the analog input signal using each of the plurality of time-interleaved ADCs, the analog input signal sampled by each of the plurality of time-interleaved ADCs at a corresponding one of the plurality of sampling phases to convert the analog signal into a digital sample;
- wherein responsive to the receiver being configured to operate at a first insertion loss mode from a plurality of insertion loss modes, enabling a first set of the plurality of SAR ADC slices of at least one of the plurality of sub-ADCs to sample the analog input signal at the data rate of the receiver to generate the digital sample such that the digital sample has a first insertion loss during the first insertion loss mode;
- and
- wherein responsive to the receiver being configured to operate at a second insertion loss mode from the plurality of insertion loss modes that is different from the first insertion loss mode, enabling a second set of the plurality of SAR ADC slices of the at least one of the plurality of sub-ADCs to sample the analog input signal at the data rate of the receiver to generate the digital sample such that the digital same has a second insertion loss during the second insertion loss mode that is different from the first insertion loss, the second set of the plurality of SAR ADC slices including a second amount of SAR ADC slices that is different from a first amount of SAR ADC slices included in the first set of the plurality of SAR ADC slices.
3 more elements
Dependencies are inferred from the claim text.