US 11,115,039 B2 · Voltage-to-time converter and method for reducing parasitic capacitance and power supply influences

Abstract

The present disclosure provides a voltage-to-time converter and method for reducing parasitic capacitance and power supply influences. The voltage-to-time converter includes: a main sampling network, a compensation sampling network, a discharge network and an over-threshold detection unit. The influence of a traditional VTC parasitic capacitance on a VTC output swing amplitude is reduced by using the compensation sampling network. A sampling common-mode level of the compensation sampling network is compensated, such that the influence of the low-frequency disturbance of a power supply voltage on a threshold of a traditional VTC threshold detection circuit is reduced. The output swing amplitude of the voltage-to-time converter of the present disclosure can reduce the influence of a parasitic capacitance. A voltage common-mode level of a VTC input end is related to a power supply voltage, which reduces a conversion error caused by the influence of the power supply voltage on a threshold.

Claims9

Dependent claims

A voltage-to-time converter for reducing influences of parasitic capacitance and power supply, comprising:

a main sampling network, to sample a main input signal and a main reference level;
a compensation sampling network, to sample a compensation input signal and a compensation reference level;
the main sampling network comprises a main sampling capacitor and a main sampling common-mode level, the main sampling common-mode level samples and converts a difference between an input voltage and a reference voltage;
the compensation sampling network comprises a compensation sampling capacitor and a compensation sampling common-mode level, the compensation sampling common-mode level samples and converts the difference between the input voltage and a reference level, and compensates the input voltage;
a discharge network, to discharge the main sampling capacitor and the compensation sampling capacitor;
an over-threshold detection unit, to detect whether the output level of the discharge network exceeds the threshold and convert an input level into time.

3 more elements

A voltage-to-time conversion method for reducing influences of parasitic capacitance and power supply, comprising:

providing a main sampling network to sample a main input signal and a main reference level, and providing a compensation sampling network to sample a compensation input signal and a compensation reference level;
the main sampling network comprises a main sampling capacitor and a main sampling common-mode level, the main sampling common-mode level samples and converts a difference between an input voltage and a reference voltage;
the compensation sampling network comprises a compensation sampling capacitor and a compensation sampling common-mode level, the compensation sampling common-mode level samples and converts a difference between the input voltage and a reference level, and compensates the input voltage;
in a sampling stage, sampling the input voltage simultaneously by the main sampling network and the compensation sampling network;
in a conversion phase, merging the compensation sampling network with the main sampling network, accessing to a conversion network to detect whether an output level of a discharge network exceeds a threshold, and converting an input level into time.

2 more elements

Dependencies are inferred from the claim text.

Voltage-to-time converter and method for reducing parasitic capacitance and power supply influences

Life of this patent

Voltage-to-time converter and method for reducing parasitic capacitance and power supply influences

Life of this patent

Abstract

Claims9