# US 11,114,991 B2 · Analog front-end circuit for conditioning a sensor signal > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,114,991 B2 - Document ID: US11114991B2 - Status: Granted - Kind: B2 - Application number: 16/540,320 - Filed: 2019-08-14 - Published: 2021-02-18 - Granted: 2021-09-07 - Earliest claimed: 2019-08-14 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Sudipto Chakraborty; Rajiv Joshi - Web page: https://patentgrep.com/patent/US11114991B2 ## CPC - H03F 3/45179: {using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence)} - H03F 3/45183: {Long tailed pairs (H03F3/4521, H03F3/45237 take precedence)} - H03F 1/3211: {in differential amplifiers} - H03F 3/45475: {using IC blocks as the active amplifying circuit} - H03F 3/45659: {Controlling the loading circuit of the differential amplifier} - H03M 1/12: Analogue/digital converters ({H03M1/001 – } H03M1/10 take precedence) - H03F 2200/171: A filter circuit coupled to the output of an amplifier - H03F 2200/375: Circuitry to compensate the offset being present in an amplifier - H03M 1/0626: {by filtering} - H03M 1/124: {Sampling or signal conditioning arrangements specially adapted for A/D converters} - H03F: AMPLIFIERS - H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C) ## Abstract An analog front-end (AFE) circuit for conditioning a sensor signal is disclosed. The AFE circuit includes a first stage configured to amplify and filter the sensor signal. The first stage comprises a biquadratic filter comprising a first plurality of DC-coupled transconductance amplifiers. The AFE further includes a second stage configured to further amplify and filter the amplified sensor signal, and to compensate a direct current (DC) offset of the first stage. The second stage comprises a second plurality of AC-coupled transconductance amplifiers. Each transconductance amplifier of the first plurality and of the second plurality has a programmable transconductance and comprises a plurality of subthreshold-biased transistors. ## Claims ### Claim 1 An analog front-end (AFE) circuit for conditioning a sensor signal, the AFE circuit comprising: a first stage configured to amplify and filter the sensor signal, the first stage comprising a biquadratic filter comprising a first plurality of DC-coupled transconductance amplifiers; a second stage configured to further amplify and filter the amplified sensor signal, and to compensate a direct current (DC) offset of the first stage, the second stage comprising a second plurality of AC-coupled transconductance amplifiers, wherein each transconductance amplifier of the first plurality of DC-coupled transconductance amplifiers and of the second plurality of AC-coupled transconductance amplifiers has a programmable transconductance and comprises a plurality of subthreshold-biased transistors; and a circuit coupled to each stage of the first and second stages to perform calibration of each stage while each stage is actively processing the sensor signal. ### Claim 2 (depends on 1) The AFE of claim 1, wherein the biquadratic filter is configured as a Tow-Thomas biquad (TTBQ) filter. ### Claim 3 (depends on 1) The AFE of claim 1, wherein the biquadratic filter is configured as one of a low pass filter and a bandpass filter. ### Claim 4 (depends on 1) The AFE of claim 1, wherein at least one of the first plurality of DC-coupled transconductance amplifiers of the first stage is loaded with a capacitor (C) to produce a transconductance-capacitance (Gm-C) filter. ### Claim 5 (depends on 1) The AFE of claim 1, wherein the biquadratic filter comprises: a first transconductance amplifier having a gain greater than a transconductance, wherein outputs of the first transconductance amplifier are loaded and coupled in parallel with a first capacitance to form a first Gm-C filter; a second transconductance amplifier having a gain less than about the transconductance, wherein inputs of the second transconductance amplifier are connected in series to the outputs of the first transconductance amplifier; a third transconductance amplifier having a gain equal to about the transconductance, wherein inputs of the third transconductance amplifier are connected in series to the outputs of the second transconductance amplifier, and wherein outputs of the third transconductance amplifier are loaded and coupled in parallel with a second capacitance to form a second Gm-C filter; and a fourth transconductance amplifier having a gain equal to about the transconductance, wherein inputs of the fourth transconductance amplifier are connected in series to the outputs of the third transconductance amplifier, and wherein outputs of the fourth transconductance amplifier are cross-fed in negative feedback to summing nodes at the inputs of the second transconductance amplifier. ### Claim 6 (depends on 5) The AFE of claim 5, wherein the biquadratic filter is convertible to a single pole Gm-C filter by turning off a quiescent current of one of the first Gm-C filter and the second Gm-C filter. ### Claim 7 (depends on 1) The AFE of claim 1, wherein the second stage comprises: a first transconductance amplifier having a gain greater than a transconductance, wherein outputs of the first transconductance amplifier are coupled to first terminals of DC blocking capacitors; and a second transconductance amplifier having a gain equal to about the transconductance, wherein inputs of the second transconductance amplifier are coupled to second terminals of the DC blocking capacitors, and wherein outputs of the second transconductance amplifier are cross-fed in negative feedback to inputs of the second transconductance amplifier. ### Claim 8 A system for conditioning and detecting a sensor signal, comprising: a multiplier circuit for performing a multiplication operation on the sensor signal to produce a multiplied sensor signal; an analog front-end (AFE) circuit coupled to the multiplier circuit to produce a conditioned sensor signal from the multiplied sensor signal, the AFE comprising: a first stage configured to amplify and filter the sensor signal, the first stage comprising a biquadratic filter comprising a first plurality of DC-coupled transconductance amplifiers; and a second stage configured to further amplify and filter the amplified sensor signal, and to compensate a direct current (DC) offset of the first stage, the second stage comprising a second plurality of AC-coupled transconductance amplifiers, wherein each transconductance amplifier of the first plurality of DC-coupled transconductance amplifiers and of the second plurality of AC-coupled transconductance amplifiers has a programmable transconductance and comprises a plurality of subthreshold-biased transistors; and a detector circuit coupled to the AFE to determine a presence of the conditioned sensor signal. ### Claim 9 (depends on 8) The system of claim 8, wherein the multiplication operation is one of a scalar multiplication operation and a vector multiplication operation. ### Claim 10 (depends on 9) The system of claim 9, wherein the multiplier circuit comprises N number of units, wherein the multiplier circuit implements a scalar multiplication operation by selecting K units out of N units simultaneously to produce a scalar multiplication of K/N, wherein K and N are both integers, K is less than or equal to N, and N is at least 1. ### Claim 11 (depends on 9) The system of claim 9, wherein the multiplier circuit implements a vector multiplication operation by employing two scalar multipliers implementing two scalar multiplication operations that are out of phase. ### Claim 12 (depends on 8) The system of claim 8, wherein the multiplier circuit performs up-conversion or down-conversion of the sensor signal. ### Claim 13 (depends on 8) The system of claim 8, wherein the detector circuit comprises: an analog-to-digital (ND) converter to digitize the conditioned sensor signal; and a microprocessor to digitally sense the digitized and conditioned sensor signal, to provide digital values to program parameters of each of the first plurality of DC-coupled transconductance amplifiers based on the digital values, to operate the A/D converter, and to provide digital values to program parameters of the multiplier circuit. ### Claim 14 (depends on 13) The system of claim 13, further comprising a clock system for providing clock signals to the multiplier circuit, the AFE, and the A/D converter. ### Claim 15 (depends on 8) The system of claim 8, wherein the detector circuit is further configured to provide a control signal to the multiplier circuit and the AFE to cause the system to bypass the multiplier circuit by feeding the sensor signal directly to the AFE when the sensor signal is a baseband signal. ### Claim 16 A method for conditioning a sensor signal, comprising: amplifying and filtering the sensor signal using a first stage of an analog front-end (AFE) circuit, the first stage comprising a biquadratic filter comprising two Gm-C filters connected in series; further amplifying and filtering the amplified sensor signal using a second stage of the AFE, the second stage comprising a plurality of AC-coupled transconductance amplifiers; compensating a direct current (DC) offset of the first stage using the second stage, wherein the two Gm-C filters and each transconductance amplifier of the plurality of AC-coupled transconductance amplifiers has a programmable transconductance and comprises a plurality of subthreshold-biased transistors; and converting the biquadratic filter to a single Gm-C filter by turning off a quiescent current of one of the two Gm-C filters. ### Claim 17 (depends on 16) The method of claim 16, further comprising calibrating each stage while each stage is actively processing the sensor signal. ### Claim 18 (depends on 16) The method of claim 16, further comprising multiplying the sensor signal by at least one of a scalar value and a vector value prior to amplifying the sensor signal.