# US 11,114,571 B2 · Semiconductor device and method for manufacturing same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,114,571 B2 - Document ID: US11114571B2 - Status: Granted - Kind: B2 - Application number: 16/368,026 - Filed: 2019-03-28 - Published: 2019-07-25 - Granted: 2021-09-07 - Earliest claimed: 2016-10-18 - Assignees: Denso Corporation - Applicants: Denso Corporation - Inventors: Shinichirou Yanagi; Yusuke Nonaka; Seiji Noma; Shinya Sakurai; Shogo Ikeura; Atsushi Kasahara; Shin Takizawa - Web page: https://patentgrep.com/patent/US11114571B2 ## CPC - H10D 8/25: Zener diodes - H10D 8/022: {of Zener diodes} - H10D 8/50: PIN diodes - H10D 62/125: {Shapes of junctions between the regions} - H10P 30/20: into semiconductor materials, e.g. for doping - H10P 32/12: between a solid phase and a gaseous phase - H10P 32/1406: {by ion implantation} - H10P 32/171: {being group IV material} - H10D 8/411: {PN diodes having planar bodies} - H10D 62/126: {Top-view geometrical layouts of the regions or the junctions} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device includes: a semiconductor substrate having a diode formation region; an upper diffusion region of a first conductivity type provided on a surface layer of a main surface of the semiconductor substrate in the diode formation region; and a lower diffusion region of a second conductivity type provided at a position deeper than the upper diffusion region with respect to the main surface in a depth direction of the semiconductor substrate, the lower diffusion region having a higher impurity concentration as compared to the semiconductor substrate. The lower diffusion region provides a PN joint surface with the upper diffusion region at a position deeper than the main surface, and has a maximum point indicating a maximum concentration in an impurity concentration profile of the lower diffusion region in the diode formation region. ## Claims ### Claim 1 A semiconductor device comprising: a semiconductor substrate having a diode formation region; an upper diffusion region of a first conductivity type provided on a surface layer of a main surface of the semiconductor substrate in the diode formation region; and a lower diffusion region of a second conductivity type provided at a position deeper than the upper diffusion region with respect to the main surface in a depth direction of the semiconductor substrate, the lower diffusion region having a higher impurity concentration as compared to the semiconductor substrate, wherein the lower diffusion region provides a PN junction with the upper diffusion region at a position deeper than the main surface, and has a maximum point indicating a maximum concentration in an impurity concentration profile of the lower diffusion region in the diode formation region, wherein the upper diffusion region and the lower diffusion region are distributed in rotational symmetry with a virtual line as a symmetry axis, which passes through the maximum point and follows the depth direction, wherein the PN junction has a recessed surface around the symmetry axis such that at least a portion of the upper diffusion region is recessed toward the main surface of the semiconductor substrate, and wherein the symmetry axis passes through a center of the recessed surface, and a distance between the recessed surface and the main surface shortens along a continuous curvature of the recessed surface approaching the center of the recessed surface. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the upper diffusion region and the lower diffusion region are similar to each other in shape in a front view of the main surface. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the upper diffusion region and the lower diffusion region are distributed in a perfect circular shape with the symmetry axis as the center of the upper diffusion region and the lower diffusion region in a front view of the main surface. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein: the lower diffusion region is provided to cover the upper diffusion region; and a portion of the lower diffusion region is exposed on the main surface. ### Claim 5 (depends on 1) The semiconductor device according to claim 1 further comprising: a silicide block layer provided on the main surface, wherein the silicide block layer is provided to stride over a PN joint line between the upper diffusion region exposed on the main surface and a semiconductor region of the second conductivity type. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, further comprising: a counter electrode region of the second conductivity type provided on the surface layer of the main surface in the diode formation region and having a higher impurity concentration as compared to the semiconductor substrate; and an inter-electrode region of the second conductivity type having a higher impurity concentration as compared to the semiconductor substrate, the inter-electrode region provided at a region between the upper diffusion region and the counter electrode region, wherein the semiconductor substrate is the second conductivity type. ### Claim 7 (depends on 6) The semiconductor device according to claim 6, wherein the inter-electrode region has a lower impurity concentration as compared to the maximum point of the impurity concentration in the lower diffusion region. ### Claim 8 (depends on 6) The semiconductor device according to claim 6, wherein the inter-electrode region is provided as an impurity region independent from the lower diffusion region and the counter electrode region. ### Claim 9 (depends on 6) The semiconductor device according to claim 6, wherein the inter-electrode region is provided by overlapping of impurity, which makes the lower diffusion region and the counter electrode region be the second conductivity type. ### Claim 10 (depends on 1) The semiconductor device according to claim 1, wherein the maximum point indicates the maximum concentration in the impurity concentration profile of the lower diffusion region in the depth direction and a radial direction of the diode formation region.