Ferroelectric MFM inductor and related circuits
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., National Taiwan University
InventorsMiin-Jang Chen, Po-Hsien Cheng, Yu-tung Yin
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Abstract
Techniques in accordance with embodiments described herein are directed to a MFM structure that includes a resistance component, an inductance component and a capacitance component. The MFM device is equivalent to a series LC circuit with the resistance component coupled in parallel with the capacitance component. The MFM structure is used as a series LC resonant circuit, band-pass circuit, band-stop circuit, low-pass filter, high-pass filter, oscillators, or negative capacitors.
Claims20
A structure, comprising:
- a substrate;
- a fin-shaped raised semiconductor body region over the substrate;
- a dielectric layer between the substrate and the fin-shaped raised semiconductor body region;
- an insulator bump region between the fin-shaped raised semiconductor body region and the dielectric layer;
- a gate structure at least partially over the fin-shaped raised semiconductor body region, the gate structure including a gate dielectric layer and a metal-ferroelectric-metal gate stack over the gate dielectric layer, the metal-ferroelectric-metal gate stack having a first metal layer, a second metal layer and a ferroelectric ZrO2 layer sandwiched between the first metal layer and the second metal layer;
- and
- a source/drain structure adjacent to the semiconductor body region.
A method, comprising:
- receiving a substrate having an upper silicon layer, a dielectric layer below the upper silicon layer, and a fin-shaped raised semiconductor body region;
- doping the upper silicon layer;
- forming a silicon strip structure by patterning the upper silicon layer, wherein the patterning the upper silicon layer also patterns an upper portion of the dielectric layer to form an insulator bump region between a semiconductor strip and the dielectric layer;
- forming a gate structure at least partially over the silicon strip structure, the gate structure including a stack of metal-ferroelectric-metal layers;
- and
- forming a source/drain structure adjacent to the gate structure and contacting the silicon strip structure.
A structure, comprising:
- a substrate;
- a fin-shaped raised semiconductor body region over the substrate;
- a dielectric layer between the substrate and the fin-shaped raised semiconductor body region;
- an insulator bump region between the fin-shaped raised semiconductor body region and the dielectric layer;
- a metal-ferroelectric-metal stack over the fin-shaped raised semiconductor body region, the metal-ferroelectric-metal stack having a first metal layer, a second metal layer and a ferroelectric zirconium dioxide layer vertically between the first metal layer and the second metal layer;
- and
- a conductive electrode layer over the metal-ferroelectric-metal stack.
Dependencies are inferred from the claim text.