# US 11,114,542 B2 · Semiconductor device with reduced gate height budget

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 11,114,542 B2
- Document ID: US11114542B2
- Status: Granted
- Kind: B2
- Application number: 16/441,726
- Filed: 2019-06-14
- Published: 2019-12-05
- Granted: 2021-09-07
- Earliest claimed: 2017-07-21
- Assignees: GlobalFoundries U.S. Inc.
- Applicants: Globalfoundries U.S. Inc.
- Inventors: Hui Zang; Haigou Huang
- Web page: https://patentgrep.com/patent/US11114542B2

## CPC

- H10D 64/693: {the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials}
- H10D 30/0215: {using self-aligned selective metal deposition simultaneously on gate electrodes and the source regions or drain regions}
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 30/611: {having multiple independently-addressable gate electrodes influencing the same channel (FinFETs having multiple distinct gate electrodes H10D30/6215; multi-gate TFT H10D30/6733)}
- H10D 64/017: {using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes}
- H10D 64/025: {forming recessed gates, e.g. by using local oxidation}
- H10D 64/665: {the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum (having lateral variation H10D64/671)}
- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- Y02P 80/30: Reducing waste in manufacturing processes; Calculations of released waste quantities
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

The present disclosure relates to semiconductor structures and, more particularly, to semiconductor device with reduced gate height budget and methods of manufacture. The method includes: forming a plurality of gate structures on a substrate; recessing material of the plurality of gate structures to below a surface of an insulator material; forming trenches in the insulator material and underlying material adjacent to sidewalls of the plurality of gate structures; and filling the recesses and trenches with a capping material.

## Claims

### Claim 1

A structure comprising:
a plurality of recessed gate structures each of which include gate material and sidewall material formed on sidewalls of the gate material, the plurality of recessed gate structures separated from one another by a cut within the gate material;
at least one trench structure extending to within an insulator material and a poly material underneath the insulator material, the at least one trench structure being located on sides of the sidewall material which oppose the recessed gate structures; and
a capping material over the plurality of recessed gate structures, between the sidewall material, within the cut and within the at least one trench structure between the poly material and the insulator material on sides of the sidewall material opposing the recessed gate structures.

### Claim 2 (depends on 1)

The structure of claim 1, wherein the capping material comprises SiN and SiOC.

### Claim 3 (depends on 1)

The structure of claim 1, wherein the recessed gate structures include the gate material below a top surface of the sidewall material and the capping material is above the gate material.

### Claim 4 (depends on 3)

The structure of claim 3, wherein the poly material is on a substrate and the insulator material is above and directly on the poly material, both adjacent to and directly contacting the sidewall material of the recessed gate structures.

### Claim 5 (depends on 4)

The structure of claim 4, wherein the poly material and the insulator material are directly contacting the sidewall material.

### Claim 6 (depends on 4)

The structure of claim 4, wherein the insulator material comprises at a height above a top surface of the gate material.

### Claim 7 (depends on 3)

The structure of claim 3, wherein the capping material is within the cut between adjacent gate structure of the plurality of gate structures and directly on the adjacent gate structure of the plurality of gate structures.

### Claim 8 (depends on 1)

The structure of claim 1, wherein the capping material comprises planar surface with a top surface of the sidewall material.

### Claim 9 (depends on 8)

The structure of claim 8, wherein the capping material comprises planar surface with a top surface of the insulator material.

### Claim 10 (depends on 1)

The structure of claim 1, wherein the sidewall material comprises a low-k dielectric material.

### Claim 11 (depends on 1)

The structure of claim 1, wherein the at least one trench structure comprises plural trench structures each of which extend to an underlying insulator material, the plural trench structures are defined by the sidewall material along an entire height thereof, the insulator material and the poly material.

### Claim 12 (depends on 11)

The structure of claim 11, wherein the cut extends to the underlying insulator material and the capping material directly contacts both sides of the sidewall material, a top surface of the gate material and the underlying insulator material.

### Claim 13 (depends on 1)

The structure of claim 1, wherein the cut and the at least one trench are completely filled with the capping material.

### Claim 14 (depends on 13)

The structure of claim 13, wherein the capping material directly contacts both sides of the sidewall material, the poly material and the insulator material.

### Claim 15 (depends on 1)

The structure of claim 1, wherein the cut and the at least one trench are provided in a same orientation with respect to the plurality of recessed gate structures, from a top down view, both extending to an underlying insulator material.

### Claim 16 (depends on 1)

The structure of claim 1, wherein the at least one trench is provided between adjacent recessed gate structures of the recessed gate structures.

### Claim 17 (depends on 16)

The structure of claim 16, wherein the at least one trench provided between the adjacent recessed gate structures is defined by the sidewall material of the adjacent recessed gate structure on a first set of opposing sides, the poly material and the insulator material on a second set of opposing sides and an underlying insulator material on a bottom surface.

### Claim 18 (depends on 17)

The structure of claim 17, wherein the at least one trench provided between the adjacent recessed gate structures is offset from the cut.

### Claim 19 (depends on 17)

The structure of claim 17, wherein the capping material in both the cut ant the at least one trench contact the underlying insulator material on a bottom surface.
