# US 11,114,524 B2 · Semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,114,524 B2 - Document ID: US11114524B2 - Status: Granted - Kind: B2 - Application number: 16/439,947 - Filed: 2019-06-13 - Published: 2020-04-30 - Granted: 2021-09-07 - Earliest claimed: 2018-10-30 - Assignees: Samsung Electronics Co., Ltd. - Applicants: Samsung Electronics Co., Ltd. - Inventors: Shaofeng Ding; Jinho Park; Yongseung Bang; Jeong Hoon Ahn - Web page: https://patentgrep.com/patent/US11114524B2 ## CPC - H10D 1/692: {Electrodes} - H10P 50/73: {using masks for insulating materials} - H10P 76/4085: {characterised by the processes involved to create the masks} - H10W 20/069: {by forming self-aligned vias or self-aligned contact plugs} - H10W 20/42: Vias, e.g. via plugs - H10W 20/435: {Cross-sectional shapes or dispositions of interconnections} - H10W 20/47: comprising two or more dielectric layers having different properties, e.g. different dielectric constants - H10W 20/496: {Capacitor integral with wiring layers} - H10W 20/083: {the openings being via holes penetrating underlying conductors} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A semiconductor device including a first electrode on a substrate, a second electrode on the first electrode, a first dielectric layer between the first electrode and the second electrode; a third electrode on the second electrode, a second dielectric layer between the second electrode and the third electrode, and a first contact plug penetrating the third electrode and contacting the first electrode, the first contact plug contacts a top surface of the third electrode and a side surface of the third electrode. ## Claims ### Claim 1 A semiconductor device, comprising: a first electrode on a substrate; a second electrode on the first electrode; a first dielectric layer between the first electrode and the second electrode; a third electrode on the second electrode; a second dielectric layer between the second electrode and the third electrode; a first contact plug penetrating the third electrode and contacting the first electrode; and a buffer dielectric layer on a top surface of the third electrode, wherein the first contact plug contacts the top surface of the third electrode and a side surface of the third electrode, the buffer dielectric layer does not cover a first portion of the top surface of the third electrode, and the first portion of the top surface of the third electrode is in contact with the first contact plug. ### Claim 2 (depends on 1) The semiconductor device of claim 1, wherein the first contact plug penetrates the first and second dielectric layers. ### Claim 3 (depends on 1) The semiconductor device of claim 1, wherein a bottom surface of the first contact plug is between a top surface of the first electrode and a bottom surface of the first electrode. ### Claim 4 (depends on 1) The semiconductor device of claim 1, wherein the first contact plug comprises: a first segment at least a portion of which being above the top surface of the third electrode, and a second segment between the top surface of the third electrode and a bottom surface of the first electrode, and a width of the first segment is greater than a width of the second segment. ### Claim 5 (depends on 4) The semiconductor device of claim 4, wherein a first surface of the first segment is not covered by the second segment, and the second segment is adjacent to the first surface of the first segment and extends towards a top surface of the substrate from the first surface of the first segment, the first surface of the first segment is parallel to the top surface of the substrate. ### Claim 6 (depends on 5) The semiconductor device of claim 5, wherein the buffer dielectric layer covers a second portion of the top surface of the third electrode, the second portion of the top surface of the third electrode being coplanar with the first surface of the first segment. ### Claim 7 (depends on 5) The semiconductor device of claim 5, wherein the buffer dielectric layer covers a second portion of the top surface of the third electrode, the second portion of the top surface of the third electrode being at a higher level than that of the first surface of the first segment. ### Claim 8 (depends on 5) The semiconductor device of claim 5, wherein the first contact plug comprises a first side surface and a second side surface facing each other, the first side surface of the first segment and the first side surface of the second segment are not aligned with each other, the second side surface of the first segment and the second side surface of the second segment are aligned with each other, and the first surface of the first segment connects the first side surface of the first segment to the first side surface of the second segment. ### Claim 9 (depends on 4) The semiconductor device of claim 4, wherein a first surface of the first segment and a second surface of the first segment are not covered by the second segment, the first surface of the first segment and the second surface of the first segment are parallel to a top surface of the substrate, the second segment is between the first surface of the first segment and the second surface of the first segment, and extends towards a top surface of the substrate from the first surface of the first segment and the second surface of the first segment, the first contact plug further comprises a first side surface and a second side surface facing each other, the first side surface of the first segment and the first side surface of the second segment are not aligned with each other, the second side surface of the first segment and the second side surface of the second segment are not aligned with each other, the first surface of the first segment connects the first side surface of the first segment to the first side surface of the second segment, and the second surface of the first segment connects the second side surface of the first segment to the second side surface of the second segment. ### Claim 10 (depends on 1) The semiconductor device of claim 1, further comprising: a lower connection line between the substrate and the first electrode; a second contact plug in contact with the second electrode; an upper connection line on a top surface of the second contact plug; and a through plug connecting the lower connection line to the upper connection line. ### Claim 11 (depends on 10) The semiconductor device of claim 10, further comprising: a first interlayer dielectric layer on the third electrode; a buffer dielectric layer on the first interlayer dielectric layer; and a second interlayer dielectric layer on the buffer dielectric layer, wherein the second contact plug penetrates the first interlayer dielectric layer and the buffer dielectric layer, and the upper connection line is in the second interlayer dielectric layer. ### Claim 12 A semiconductor device, comprising: a first electrode on a substrate, the first electrode having a first penetrating portion; a first dielectric layer on a top surface of the first electrode and in the first penetrating portion; a second electrode on the first dielectric layer, the second electrode having a second penetrating portion that does not overlap the first penetrating portion; a second dielectric layer on a top surface of the second electrode and in the second penetrating portion; a third electrode on the second dielectric layer, the third electrode having a third penetrating portion and a fourth penetrating portion, the third penetrating portion overlapping the second penetrating portion, the fourth penetrating portion overlapping the first penetrating portion; and a first contact plug in the second and third penetrating portions, the first contact plug connecting the first electrode to the third electrode. ### Claim 13 (depends on 12) The semiconductor device of claim 12, wherein the first dielectric layer and the second dielectric layer are in contact with each other in the second penetrating portion. ### Claim 14 (depends on 12) The semiconductor device of claim 12, wherein a bottom surface of the first contact plug is between the top surface of the first electrode and a bottom surface of the first electrode. ### Claim 15 (depends on 12) The semiconductor device of claim 12, wherein the first contact plug is in contact with a side surface of the third electrode and a portion of a top surface of the third electrode, the side surface of the third electrode and the portion of the top surface of the third electrode overlapping the second penetrating portion. ### Claim 16 (depends on 15) The semiconductor device of claim 15, further comprising: a buffer dielectric layer on the top surface of the third electrode, wherein the buffer dielectric layer does not cover the side surface of the third electrode and the portion of the top surface of the third electrode, the side surface of the third electrode and the portion of the top surface of the third electrode being in contact with the first contact plug. ### Claim 17 (depends on 12) The semiconductor device of claim 12, further comprising: a second contact plug on the first penetrating portion and connected to the second electrode; a first upper connection line on the first contact plug; and a second upper connection line on the second contact plug. ### Claim 18 A semiconductor device, comprising: a first electrode on a substrate; a second electrode on the first electrode; a third electrode on the second electrode; a dielectric layer between the first electrode, the second electrode and the third electrode; a first contact plug connecting the first electrode to the third electrode; a second contact plug penetrating a portion of the dielectric layer and contacting the second electrode; a lower connection line between the substrate and the first electrode; an upper connection line on a top surface of the second contact plug; and a through plug connecting the lower connection line to the upper connection line, wherein a bottom surface of the first contact plug is higher than a bottom surface of the first electrode. ### Claim 19 (depends on 18) The semiconductor device of claim 18, further comprising: a buffer dielectric layer on a top surface of the third electrode, wherein the first contact plug penetrates the third electrode, the first contact plug contacts the top surface of the third electrode and a side surface of the third electrode, and the top surface of the third electrode and the side surface of the third electrode are not covered by the buffer dielectric layer. ### Claim 20 (depends on 18) The semiconductor device of claim 18, wherein the first contact plug comprises: a first segment above a top surface of the third electrode, and a second segment below the top surface of the third electrode, a width of the first segment is greater than a width of the second segment, and the first segment has a surface coplanar with the top surface of the third electrode.