# US 11,114,479 B2 · Optoelectronics and CMOS integration on GOI substrate

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- Number: US 11,114,479 B2
- Document ID: US11114479B2
- Status: Granted
- Kind: B2
- Application number: 16/358,807
- Filed: 2019-03-20
- Published: 2019-07-18
- Granted: 2021-09-07
- Earliest claimed: 2015-03-18
- Assignees: International Business Machines Corporation
- Applicants: International Business Machines Corporation
- Inventors: Effendi Leobandung; Ning Li; Devendra K. Sadana
- Web page: https://patentgrep.com/patent/US11114479B2

## CPC

- H10F 39/10: Integrated devices
- G02B 6/00: Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B 6/12004: {Combinations of two or more optical elements}
- H01S 5/0261: {Non-optical elements, e.g. laser driver components, heaters (H01S5/0265 takes precedence)}
- H01S 5/3211: {characterised by special cladding layers, e.g. details on band-discontinuities}
- H01S 5/32316: {comprising only (Al)GaAs}
- H10D 84/85: Complementary IGFETs, e.g. CMOS
- H10D 86/01: Manufacture or treatment
- H10F 71/127: {The active layers comprising only Group III-V materials, e.g. GaAs or InP}
- H10F 71/1276: {comprising growth substrates not made of Group III-V materials}
- H10F 77/124: comprising only Group III-V materials, e.g. GaAs
- H10W 90/00: Package configurations
- G02B 2006/12078: {Gallium arsenide or alloys (GaAs, GaAlAs, GaAsP, GaInAs)}
- G02B 2006/12121: {Laser}
- G02B 2006/12123: {Diode}
- H01S 5/021: {Silicon based substrates}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- H01S: DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A single chip including an optoelectronic device on the semiconductor layer in a first region, the optoelectronic device comprises a bottom cladding layer, an active region, and a top cladding layer, wherein the bottom cladding layer is above and in direct contact with the semiconductor layer, the active region is above and in direct contact with the bottom cladding layer, and the top cladding layer is above and in direct contact with the active region, a silicon device on the substrate extension layer in a second region, a device insulator layer substantially covering both the optoelectronic device in the first region and the silicon device in the second region, and a waveguide embedded within the device insulator layer in direct contact with a sidewall of the active region of the optoelectronic device.

## Claims

### Claim 1

A structure comprising:
a germanium layer above a semiconductor substrate in a first region of the semiconductor substrate;
an optoelectronic device on the germanium layer in the first region, the optoelectronic device has a bottom cladding layer, an active region adjacent to and contacting a waveguide, and a top cladding layer, wherein the bottom cladding layer is on the germanium layer, the active region is on the bottom cladding layer, and the top cladding layer is on the active region; and
a silicon device on a silicon layer in a second region of the semiconductor substrate,
wherein an upper surface of the silicon layer in the second region is above an upper surface of the germanium layer in the first region.

### Claim 2 (depends on 1)

The structure according to claim 1, wherein the optoelectronic device comprises a III-V semiconductor material.

### Claim 3 (depends on 1)

The structure according to claim 1, wherein the silicon device is a silicon complementary metal-oxide-semiconductor (CMOS) device.

### Claim 4 (depends on 1)

The structure according to claim 1, further comprising:
a first contact, a second contact, and a device contact, wherein the first contact is directly connected to the top cladding layer, the second contact is directly connected to the bottom cladding layer, and the device contact is directly connected to the silicon device.

### Claim 5 (depends on 1)

The structure according to claim 1, wherein the waveguide is embedded in an insulator layer and in direct contact with a sidewall of the active region of the optoelectronic device.

### Claim 6 (depends on 1)

The structure according to claim 1, further comprising:
an insulator layer substantially covering both the optoelectronic device in the first region and the silicon device in the second region.

### Claim 7

A structure comprising:
a germanium layer above a semiconductor substrate in a first region of the semiconductor substrate;
an optoelectronic device on the germanium layer in the first region, the optoelectronic device has a bottom cladding layer, an active region adjacent to and contacting a waveguide, and a top cladding layer, wherein the bottom cladding layer is on the germanium layer, the active region is on the bottom cladding layer, and the top cladding layer is on the active region; and
a silicon device on a silicon layer in a second region of the semiconductor substrate,
wherein both the top cladding layer and the bottom cladding layer are AlGaAs and the active region is GaAs.

### Claim 8 (depends on 7)

The structure according to claim 7, wherein the optoelectronic device comprises a III-V semiconductor material.

### Claim 9 (depends on 7)

The structure according to claim 7, wherein the silicon device is a silicon complementary metal-oxide-semiconductor (CMOS) device.

### Claim 10 (depends on 7)

The structure according to claim 7, further comprising:
a first contact, a second contact, and a device contact, wherein the first contact is directly connected to the top cladding layer, the second contact is directly connected to the bottom cladding layer, and the device contact is directly connected to the silicon device.

### Claim 11 (depends on 7)

The structure according to claim 7, wherein the waveguide is embedded in an insulator layer and in direct contact with a sidewall of the active region of the optoelectronic device.

### Claim 12 (depends on 7)

The structure according to claim 7, further comprising:
an insulator layer substantially covering both the optoelectronic device in the first region and the silicon device in the second region.

### Claim 13

A structure comprising:
a germanium layer above a semiconductor substrate in a first region of the semiconductor substrate;
an optoelectronic device on the germanium layer in the first region, the optoelectronic device has a bottom cladding layer, an active region, and a top cladding layer, wherein the bottom cladding layer is on the germanium layer, the active region is on the bottom cladding layer, and the top cladding layer is on the active region;
a silicon device on a silicon layer in a second region of the semiconductor substrate; and
a waveguide embedded within an insulator layer, the waveguide is in direct contact with a sidewall of the active region of the optoelectronic device, wherein both the top cladding layer and the bottom cladding layer are AlGaAs and the active region is GaAs.

### Claim 14 (depends on 13)

The structure according to claim 13, wherein the optoelectronic device comprises a III-V semiconductor material.

### Claim 15 (depends on 13)

The structure according to claim 13, wherein the silicon device is a silicon complementary metal-oxide-semiconductor (CMOS) device.

### Claim 16 (depends on 13)

The structure according to claim 13, further comprising:
a first contact, a second contact, and a device contact, wherein the first contact is directly connected to the top cladding layer, the second contact is directly connected to the bottom cladding layer, and the device contact is directly connected to the silicon device.

### Claim 17 (depends on 13)

The structure according to claim 13, wherein the insulator layer substantially covers both the optoelectronic device in the first region and the silicon device in the second region.