# US 11,114,448 B2 · Semiconductor device and method for fabricating the same

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- Number: US 11,114,448 B2
- Document ID: US11114448B2
- Status: Granted
- Kind: B2
- Application number: 16/506,556
- Filed: 2019-07-09
- Published: 2021-01-14
- Granted: 2021-09-07
- Earliest claimed: 2019-07-09
- Assignees: Nanya Technology Corporation
- Applicants: Nanya Technology Corporation
- Inventors: Cheng-Ling Yang
- Web page: https://patentgrep.com/patent/US11114448B2

## CPC

- H10W 20/432: {comprising crossing interconnections}
- H10W 20/493: {Fuses, i.e. interconnections changeable from conductive to non-conductive}
- H10B 20/25: One-time programmable ROM [OTPROM] devices, e.g. using electrically-fusible links
- H10W 20/40: Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W 20/4405: {the principal metal being aluminium}
- H10W 20/4421: {the principal metal being copper}
- H10W 20/4424: {Copper alloys}
- H10W 20/4441: {the principal metal being a refractory metal}
- H10W 20/491: {Antifuses, i.e. interconnections changeable from non-conductive to conductive}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having a first region and a second region, a first semiconductor element positioned in the first region of the substrate, a second semiconductor element positioned in the first region of the substrate, a bridge conductive unit electrically connected the first semiconductor element and the second semiconductor element, and a programmable unit positioned in the second region and electrically connected to the bridge conductive unit.

## Claims

### Claim 1

A semiconductor device; comprising:
a substrate comprising a first region and a second region;
a first semiconductor element positioned in the first region of the substrate;
a second semiconductor element positioned in the first region of the substrate;
a bridge conductive unit electrically connected to the first semiconductor element and the second semiconductor element; and
a programmable unit positioned in the second region and electrically connected to the bridge conductive unit;
wherein the programmable unit comprises a first programmable conductive layer, a programmable insulating layer, and a second programmable conductive layer, the first programmable conductive layer is electrically connected to the bridge conductive unit, the programmable insulating layer is positioned above the first programmable conductive layer, and the second programmable conductive layer is positioned above the programmable insulating layer,
wherein the bridge conductive unit is interposed between the first and second semiconductor elements.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the first programmable conductive layer is formed of aluminum, copper, silver, gold, platinum, or alloys thereof.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the programmable insulating layer is formed of silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, aluminum oxide, tantalum oxide, titanium oxide, or aluminum nitride.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein a thickness of the programmable insulating layer is about 0.5 nm to about 50 nm.

### Claim 5 (depends on 1)

The semiconductor device of claim 1, wherein the programmable unit is positioned at a vertical level higher than a vertical level of the first semiconductor element.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the bridge conductive unit is formed of aluminum, tungsten, copper, or copper alloy.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the substrate is formed of bulk silicon or silicon on insulator.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the first region is adjacent to the second region.