# US 11,114,445 B2 · Semiconductor device

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- Number: US 11,114,445 B2
- Document ID: US11114445B2
- Status: Granted
- Kind: B2
- Application number: 16/909,200
- Filed: 2020-06-23
- Published: 2021-04-15
- Granted: 2021-09-07
- Earliest claimed: 2019-10-15
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Jay-Bok Choi; Hyeonok Jung; Jemin Park; Yongseok Ahn
- Web page: https://patentgrep.com/patent/US11114445B2

## CPC

- H10B 12/31: {having a storage electrode stacked over the transistor}
- H10B 12/50: {Peripheral circuit region structures}
- G11C 7/06: Sense amplifiers; Associated circuits {, e.g. timing or triggering circuits}
- H10B 12/34: {the transistor being at least partially in a trench in the substrate}
- H10B 12/488: {Word lines}
- H10B 41/41: of a memory region comprising a cell select transistor, e.g. NAND
- H10B 41/50: characterised by the boundary region between the core region and the peripheral circuit region
- H10B: ELECTRONIC MEMORY DEVICES
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A semiconductor device includes a substrate having an active pattern, a cell region on the substrate and having a cell circuit, and a core region on the substrate having a peripheral circuit. In plan view, the active pattern on the core region includes a plurality of corners. Each of the corners has a rounding index that is equal to or less than about 15 nm. The rounding index is a distance between a respective tip of each of the corners and a right-angled corner.

## Claims

### Claim 1

A semiconductor device, comprising:
a substrate comprising an active pattern;
a cell region on the substrate, the cell region comprising a cell circuit; and
a core region on the substrate, the core region comprising a peripheral circuit,
wherein, in plan view, the active pattern on the core region comprises a plurality of corners,
wherein each of the corners has a rounding index that is equal to or less than about 15 nm, wherein the rounding index indicates a distance between a respective tip of the each of the corners and a right-angled corner.

### Claim 2 (depends on 1)

The semiconductor device of claim 1, wherein the rounding index of the each of the corners is in a range of about 5 nm to about 15 nm.

### Claim 3 (depends on 1)

The semiconductor device of claim 1, wherein the rounding index of the each of the corners is zero.

### Claim 4 (depends on 1)

The semiconductor device of claim 1, wherein the core region comprises:
a first core region on at least one side of the cell region; and
a second core region on at least one other side of the cell region,
wherein the active pattern is on at least one of the first and second core regions.

### Claim 5 (depends on 4)

The semiconductor device of claim 4, wherein one of the first and second core regions comprises a sense amplifier circuit, and another of the first and second core regions comprises a sub-word line driver circuit.

### Claim 6 (depends on 1)

The semiconductor device of claim 1, wherein the each of the corners has a corner angle of about 90°.

### Claim 7 (depends on 1)

The semiconductor device of claim 1, wherein the peripheral circuit is a first peripheral circuit, and further comprising a peripheral region on the substrate, the peripheral region comprising a second peripheral circuit,
wherein the active pattern comprises first and second active patterns, wherein a density of the first active patterns on the core region is greater than a density of the second active patterns on the peripheral region.

### Claim 8 (depends on 1)

The semiconductor device of claim 1, wherein the peripheral circuit comprises first and second peripheral circuits, and wherein the core region comprises:
a plurality of first core regions comprising the first peripheral circuits on opposite sides of the cell region; and
a plurality of second core regions comprising the second peripheral circuits on other opposite sides of the cell region,
wherein at least one of the first and second core regions comprises:
the active pattern comprising the plurality of corners, wherein the rounding index is zero; or
the active pattern comprising the plurality of corners, wherein the rounding index is equal to or less than about 15 nm.

### Claim 9 (depends on 8)

The semiconductor device of claim 8, wherein
the cell circuit comprises a memory circuit,
the first peripheral circuits comprise a sense amplifier circuit, and
the second peripheral circuits comprise a sub-word line driver circuit.

### Claim 10

A semiconductor device, comprising:
a substrate comprising a cell region and a core region; and
active patterns on the cell region and on the core region,
wherein
the core region is divided into a plurality of regions,
wherein, in plan view, ones of the active patterns on each of the plurality of regions respectively comprise a plurality of corners, and
each of the corners has a rounding index that is equal to or less than about 15 nm, wherein the rounding index indicates a distance between a respective tip of the each of the corners and a right-angled corner.

### Claim 11 (depends on 10)

The semiconductor device of claim 10, wherein the active patterns on the core region comprise:
a first active pattern that has a tetragonal shape;
a second active pattern that has a dumbbell shape; and
a third active pattern that has a comb shape.

### Claim 12 (depends on 11)

The semiconductor device of claim 11, wherein one or more of the first, second, or third active patterns are provided in plural.

### Claim 13 (depends on 11)

The semiconductor device of claim 11, wherein each of the plurality of regions comprises one or more of the first, second, or third active patterns.

### Claim 14 (depends on 11)

The semiconductor device of claim 11, wherein at least one of the plurality of regions comprises two or more of the first, second, or third active patterns,
wherein the two or more of the first, second, or third active patterns have a same shape or different shapes from each other.

### Claim 15 (depends on 11)

The semiconductor device of claim 11, wherein neighboring ones of the first, second, or third active patterns are spaced apart from each other in a first direction and are spaced apart from each other in a second direction intersecting the first direction.

### Claim 16 (depends on 15)

The semiconductor device of claim 15, wherein the active patterns on the cell region comprise a plurality of cell active patterns,
wherein each of the cell active patterns extends discontinuously or continuously in at least one of the first direction, the second direction, or a third direction intersecting the first and second directions.

### Claim 17 (depends on 16)

The semiconductor device of claim 16, wherein each of the cell active patterns has an island shape that extends along the third direction intersecting the first and second directions.

### Claim 18

A semiconductor device, comprising:
a semiconductor substrate comprising a cell region on which a memory circuit is provided and a core region on which a peripheral circuit is provided;
a plurality of cell active patterns on the cell region, the cell active patterns having a same shape and arranged spaced apart from one another; and
a plurality of peripheral active patterns on the core region,
wherein, in plan view, each of the peripheral active patterns has a plurality of corners,
wherein each of the corners has a rounding index that is equal to or less than about 15 nm, wherein the rounding index indicates a distance between a respective tip of the each of the corners and a right-angled corner.

### Claim 19 (depends on 18)

The semiconductor device of claim 18, wherein
the same shape of the cell active patterns comprises an island shape, and
the peripheral active patterns have respective shapes that are different from the island shape.

### Claim 20 (depends on 18)

The semiconductor device of claim 18, wherein the peripheral active patterns comprise:
a plurality of first peripheral active patterns, each of which has a tetragonal shape;
a plurality of second peripheral active patterns, each of which has a dumbbell shape; and
a plurality of third peripheral active patterns, each of which has a comb shape,
wherein the first, second, and third peripheral active patterns are arranged along a first direction or a second direction perpendicular to the first direction, and
wherein each of the cell active patterns has an island shape that extends along a third direction intersecting the first and second directions.