Semiconductor structure formation
AssigneeMicron Technology, Inc.
InventorsVivek Yadav, Fatma Arzum Simsek-Ege, Sanjeev Sapra, Thomas A. Figura, Kangle Li
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Abstract
Systems, apparatuses, and methods related to semiconductor structure formation are described. An example method may include patterning a working surface of a semiconductor wafer. The method may further include performing a vapor etch on a first dielectric material at the working surface to recess the first dielectric material to a first intended depth of an opening relative to the working surface and to expose a second dielectric material on a sidewall of the opening. The method may further include performing a wet etch on the second dielectric material to recess the second dielectric material to the intended depth.
Claims21
A method for semiconductor structure formation, comprising:
- patterning a working surface of a semiconductor wafer;
- performing a vapor etch selective to a first oxide material at the working surface to recess the first oxide material to a first intended depth of an opening relative to the working surface and to expose a second oxide material on a sidewall of the opening;
- and
- subsequent to performing the vapor etch, performing a wet etch selective to the second oxide material to recess the second oxide material to the first intended depth.
A method for semiconductor structure formation, comprising:
- forming an isolation trench in a plurality of semiconductor materials by:
- performing a vapor etch selective to silicon oxide (SiO2) as a first dielectric material to recess the first dielectric material to an intended depth in the isolation trench;
- exposing, by performance of the vapor etch, aluminum oxide (Al2O2) as a second dielectric material on a sidewall of the isolation trench;
- and
- subsequent to exposing, by performance of the vapor etch, performing a wet etch selective to the aluminum oxide (Al2O2) to recess the aluminum oxide (Al2O2) on the sidewall to the intended depth.
A method for semiconductor structure formation, comprising:
- forming an isolation trench in a plurality of semiconductor materials by:
- vapor etching an opening into a silicon oxide (SiO2) material formed over aluminum oxide (Al2O2) material to expose the aluminum oxide (Al2O2) material on a sidewall of the opening, wherein a reactant used for the vapor etching is selective to the silicon oxide (SiO2) material relative to the aluminum oxide (Al2O2) material;
- and
- subsequent to vapor etching the opening, wet etching the aluminum oxide (Al2O2) material exposed on the sidewall of the opening, wherein a reactant used for the wet etching is selective to the aluminum oxide (Al2O2) material relative to silicon oxide (SiO2) material;
- wherein:
- the vapor etching recesses the opening in the silicon oxide (SiO2) material to an intended depth relative to a working surface of the plurality of semiconductor materials;
- the wet etching recesses the exposed aluminum oxide (Al2O2) material on the sidewall of the opening to the intended depth;
- and
- selectivity of the wet etching to the exposed aluminum oxide (Al2O2) material leaves an exposed surface of the silicon oxide (SiO2) material substantially at the intended depth.
Dependencies are inferred from the claim text.