Multi-division 3D NAND memory device
AssigneeYangtze Memory Technologies Co., Ltd.
InventorsZhong Zhang, Yan Ni Li
Life of this patent
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Abstract
Disclosed is a method for forming a staircase structure of 3D memory. The method includes providing a substrate, forming an alternating layer stack over the substrate, forming a plurality of block regions over a surface of the alternating layer stack, forming a first plurality of staircase structures to expose a portion of a first number of top-most layer stacks at each of the block regions and removing the first number of the layer stacks at a second plurality of staircase structures at each of the block regions.
Claims20
A semiconductor structure, comprising:
- a substrate;
- and
- a plurality of layer stacks disposed over the substrate, wherein the plurality of layer stacks comprises first and second staircase structures abutting each other, wherein:
- a bottommost step of the second staircase structure is separated from and higher than a topmost step of the first staircase structure;
- each of the first and the second staircase structures comprises P steps in a first direction;
- each of the P steps comprises N steps, wherein P and N are natural numbers greater than or equal to 1;
- and
- each of the N steps of the first staircase structure extends towards a second direction, wherein each of the N steps of the second staircase structure extends towards another direction opposite to the second direction.
A semiconductor structure, comprising:
- a stack storage region disposed over a substrate;
- and
- a plurality of layer stacks surrounding the stack storage region, comprising:
- a first staircase structure abutting the stack storage region in a first direction;
- a second staircase structure abutting the first staircase structure in a second direction, wherein:
- each of the first and the second staircase structures comprises P steps in the first direction;
- each of the P steps of the first and the second staircase structures comprises N steps in the second direction, wherein P and N are natural numbers greater than or equal to 1;
- and
- a topmost step of the second staircase structure is higher than another topmost step of the first staircase structure;
- and
- a third staircase abutting the first staircase structure in a third direction, wherein the third staircase structure comprises P steps in the first direction, and wherein each of the P steps of the third staircase structure comprises N steps in the third direction.
A semiconductor structure, comprising:
- a stack storage region disposed over a substrate;
- a first plurality of layer stacks surrounding the stack storage region;
- a second plurality of layer stack disposed over the first plurality of layer stack;
- a first staircase structure abutting the stack storage region in a first direction and comprising P steps in the first direction, wherein:
- the first staircase structure exposes each layer stack of the first plurality of layer stacks;
- and
- each of the P steps of the first staircase structure comprises N steps extending in a second direction;
- and
- a second staircase structure abutting the first staircase structure in the second direction, wherein:
- the second staircase structure exposes each layer stack of the second plurality of layer stacks;
- the second staircase structure comprises P steps in the first direction, wherein each of the P steps of the second staircase structure comprises N steps extending in another direction opposite to the second direction;
- a bottommost step of the second staircase structure is higher than a topmost step of the first staircase structure;
- and
- a separation between the bottommost step of the second staircase structure and the stack storage region is substantially equal to another separation between another bottommost step of the first staircase structure and the stack storage region.
Dependencies are inferred from the claim text.