# US 11,114,437 B2 · Semiconductor device comprising first and second standard cells arranged adjacent to each other > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,114,437 B2 - Document ID: US11114437B2 - Status: Granted - Kind: B2 - Application number: 16/842,599 - Filed: 2020-04-07 - Published: 2020-07-23 - Granted: 2021-09-07 - Earliest claimed: 2013-09-04 - Assignees: Socionext Inc. - Applicants: Socionext Inc. - Inventors: Hiroyuki Shimbo - Web page: https://patentgrep.com/patent/US11114437B2 ## CPC - H10D 84/853: {comprising FinFETs} - H10D 30/0243: {using dummy structures having essentially the same shapes as the semiconductor bodies, e.g. to provide stability} - H10D 84/204: {of combinations of diodes or capacitors or resistors} - H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors} - H10D 84/834: {comprising FinFETs} - H10D 89/10: Integrated device layouts - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract Disclosed herein is a semiconductor device including two standard cells which are arranged adjacent to each other in an X direction. One of the two standard cells includes a plurality of first fins which extend in the X direction, and which are arranged along a boundary between the two standard cells in a Y direction. The other standard cell includes a plurality of second fins which extend in the X direction, and which are arranged along the boundary between the two standard cells in the Y direction. The plurality of second fins includes a dummy fin. ## Claims ### Claim 1 A semiconductor device comprising first and second standard cells which are arranged adjacent to each other in a first direction, wherein: the first standard cell includes a plurality of first fins which extend in the first direction, and which are arranged along a boundary between the first and second standard cells in a second direction that is perpendicular to the first direction, the second standard cell includes a plurality of second fins which extend in the first direction, and which are arranged in the second direction along the boundary between the first and second standard cells such that each of the plurality of second fins is aligned with an associated one of the plurality of first fins, wherein the plurality of second fins include at least one dummy fin and at least one first active fin, the second standard cell further includes at least one second active fin different from the plurality of first fins and the plurality of second fins, wherein the at least one second active fin, the at least one dummy fin and one of the plurality of first fins are aligned with each other in the first direction, and the first and second standard cells include a first power supply line and a second power supply line having a different potential than the first power supply line, both extending in the first direction. ### Claim 2 (depends on 1) The semiconductor device of claim 1, wherein the at least one first active fin extends in the first direction from one end portion to the other end portion of the second standard cell. ### Claim 3 (depends on 1) The semiconductor device of claim 1, wherein at least one of the first fins is a fin of an active transistor. ### Claim 4 (depends on 3) The semiconductor device of claim 3, wherein all of the first fins are fins of active transistors. ### Claim 5 (depends on 3) The semiconductor device of claim 3, wherein the fin of the active transistor extends in the first direction from one end portion to the other end portion of the first standard cell. ### Claim 6 (depends on 1) The semiconductor device of claim 1, wherein the at least one dummy fin is configured as an OFF-state transistor fin forming part of an OFF-state transistor. ### Claim 7 (depends on 1) The semiconductor device of claim 1, wherein the at least one second active fin is not adjacent to the boundary. ### Claim 8 (depends on 7) The semiconductor device of claim 7, wherein the at least one dummy fin is disposed between the at least one second active fin and the boundary in the first direction. ### Claim 9 (depends on 1) The semiconductor device of claim 1, wherein the first active fins are coupled to the second power supply line, and the at least one second active fin is coupled to the first power supply line. ### Claim 10 (depends on 1) The semiconductor device of claim 1, wherein no fin crosses the boundary. ### Claim 11 (depends on 1) The semiconductor device of claim 1, wherein each of the first standard cell and the second standard cell includes a p-type transistor and an n-type transistor. ### Claim 12 A semiconductor device comprising first and second standard cells which are arranged adjacent to each other in a first direction, wherein: the first standard cell includes a plurality of first fins which extend in the first direction, and which are arranged along a boundary between the first and second standard cells in a second direction that is perpendicular to the first direction, the second standard cell includes a plurality of fin transistors, fins of the plurality of fin transistors extend in the first direction and are arranged in the second direction along the boundary between the first and second standard cells such that each of the fins of the plurality of fin transistors is aligned with an associated one of the plurality of first fins in the first direction, wherein the plurality of fin transistors include at least one non-active transistor which does not contribute to any logical function of the second standard cell and at least one first active transistor, the second standard cell further includes at least one second active transistor different from the plurality of fin transistors, wherein a fin of the at least one non-active transistor and a fin of the at least one second active transistor are aligned with each other in the first direction, and the first and second standard cells include a first power supply line and a second power supply line having a different potential than the first power supply line, both extending in the first direction. ### Claim 13 (depends on 12) The semiconductor device of claim 12, wherein a fin of the at least one first active transistor extends in the first direction from one end portion to the other end portion of the second standard cell. ### Claim 14 (depends on 12) The semiconductor device of claim 12, wherein at least one of the first fins is a fin of an active transistor. ### Claim 15 (depends on 14) The semiconductor device of claim 14, wherein all of the first fins are fins of active transistors. ### Claim 16 (depends on 14) The semiconductor device of claim 14, wherein the fin of the active transistor extends in the first direction from one end portion to the other end portion of the first standard cell. ### Claim 17 (depends on 12) The semiconductor device of claim 12, wherein the at least one non-active transistor is an OFF-state transistor. ### Claim 18 (depends on 12) The semiconductor device of claim 12, wherein each of the plurality of fin transistors and the at least one non-active transistor includes a gate.