Semi-conductor package
AssigneeSamsung Electro-Mechanics Co., Ltd.
InventorsSuk Youn Hong, Han Su Park
Life of this patent
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Abstract
A semiconductor package includes a substrate, a plurality of electronic components mounted on a first surface of the substrate, and an encapsulant disposed on the first surface of the substrate so that at least one of the plurality of electronic components is embedded in the encapsulant. The substrate includes a flow preventing portion including at least one flow preventing groove disposed in the first surface and adjacent to the encapsulant and/or at least one dam disposed on the first surface and adjacent to the encapsulant.
Claims19
A semiconductor package, comprising:
- a substrate;
- a plurality of electronic components mounted on a first surface of the substrate;
- and
- an encapsulant disposed on the first surface of the substrate so that at least one of the plurality of electronic components is embedded in the encapsulant;
- wherein the substrate comprises a flow preventing portion including at least one flow preventing groove disposed in the first surface and adjacent to the encapsulant and/or at least one dam disposed on the first surface and adjacent to the encapsulant, and
- wherein the at least one flow preventing groove or the at least one dam is spaced apart from the encapsulant by 80 μm to 100 μm.
A semiconductor package, comprising:
- a substrate;
- a plurality of electronic components mounted on a first surface of the substrate;
- an encapsulant disposed on the first surface of the substrate so that at least one of the plurality of electronic components is embedded in the encapsulant,
- wherein the substrate comprises a flow preventing portion disposed adjacent to the encapsulant,
- wherein the flow preventing portion comprises a flow preventing groove disposed in the first surface of the substrate and a dam disposed on the first surface of the substrate, and
- wherein the flow preventing portion is spaced apart from the encapsulant by 80 μm to 100 μm, and
- wherein a width of the flow preventing groove is 80 μm to 100 μm, and a depth of the flow preventing groove is 20 μm to 30 μm.
A semiconductor package, comprising:
- a substrate;
- an encapsulant disposed on a first surface of the substrate;
- a first electronic component mounted on the first surface of the substrate and embedded in the encapsulant;
- a second electronic component mounted on the first surface of the substrate outside of the encapsulant;
- a first flow preventing element disposed along the first surface of the substrate between the encapsulant and the second electronic component;
- and
- a second flow preventing element disposed along the first surface of the substrate between the first flow preventing element and the second electronic component,
- wherein the first flow preventing element is a groove disposed in the first surface of the substrate, and the groove is spaced apart from the encapsulant by 80 μm to 100 μm.
A semiconductor package, comprising:
- a substrate;
- an encapsulant disposed on a first surface of the substrate;
- a first electronic component mounted on the first surface of the substrate and embedded in the encapsulant;
- a second electronic component mounted on the first surface of the substrate outside of the encapsulant;
- a first flow preventing element disposed along the first surface of the substrate between the encapsulant and the second electronic component;
- and
- a second flow preventing element disposed along the first surface of the substrate between the first flow preventing element and the second electronic component,
- wherein the first flow preventing element is a first groove disposed in the first surface of the substrate,
- the second flow preventing element is a second groove disposed in the first surface of the substrate, and
- the first groove is spaced apart from the encapsulant by 80 μm to 100 μm.
A semiconductor package, comprising:
- a substrate;
- an encapsulant disposed on a first surface of the substrate;
- a first electronic component mounted on the first surface of the substrate and embedded in the encapsulant;
- a second electronic component mounted on the first surface of the substrate outside of the encapsulant;
- a first flow preventing element disposed along the first surface of the substrate between the encapsulant and the second electronic component;
- and
- a second flow preventing element disposed along the first surface of the substrate between the first flow preventing element and the second electronic component,
- wherein the first flow preventing element is a first dam disposed on the first surface of the substrate,
- the second flow preventing element is a second dam disposed on the first surface of the substrate, and
- the first dam is spaced apart from the encapsulant by 80 μm to 100 μm.
Dependencies are inferred from the claim text.