# US 11,114,305 B2 · Etching method and semiconductor manufacturing method

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- Number: US 11,114,305 B2
- Document ID: US11114305B2
- Status: Granted
- Kind: B2
- Application number: 16/756,914
- Filed: 2018-10-22
- Published: 2021-07-15
- Granted: 2021-09-07
- Earliest claimed: 2017-11-02
- Assignees: Showa Denko K.K.
- Applicants: Showa Denko K.K.
- Inventors: Yosuke Tanimoto
- Web page: https://patentgrep.com/patent/US11114305B2

## CPC

- H10P 50/283: {by chemical means}
- H10P 50/242: {of Group IV materials}
- H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

An etching method which includes treating a workpiece having a stacked film (5) of a silicon oxide layer (2) and a silicon nitride layer (3) with an etching gas containing an unsaturated halon represented by the chemical formula: C2HxF(3−x)Br (in the chemical formula, x stands for 0, 1, or 2) so as to control the respective etch rates of the silicon nitride layer and the silicon oxide layer to the same level and form a high-aspect-ratio hole having a desirable profile at a high etch rate. Also disclosed is a method of manufacturing a semiconductor which includes by carrying out the etching method.

## Claims

### Claim 1

An etching method, comprising treating a workpiece having a stacked film of a silicon oxide layer and a silicon nitride layer with an etching gas containing an unsaturated halon represented by the following chemical formula: C2HxF(3−x)Br (in the chemical formula, x stands for 0, 1, or 2) to etch both the silicon oxide layer and the silicon nitride layer.

### Claim 2 (depends on 1)

The etching method according to claim 1, wherein the unsaturated halon is at least one selected from the group consisting of bromotrifluoroethylene, (E)-1-bromo-2-fluoroethylene, and 1-bromo-1-fluoroethylene.

### Claim 3 (depends on 1)

The etching method according to claim 1, wherein the etching gas further contains an inert gas.

### Claim 4 (depends on 1)

The etching method according to claim 1, wherein in the etching step, etching is performed with a plasma gas made from the etching gas.

### Claim 5 (depends on 1)

A method of manufacturing a semiconductor, comprising performing etching by the etching method as claimed in claim 1.

### Claim 6 (depends on 2)

The etching method according to claim 2, wherein the etching gas further contains an inert gas.

### Claim 7 (depends on 2)

The etching method according to claim 2, wherein in the etching step, etching is performed with a plasma gas made from the etching gas.

### Claim 8 (depends on 3)

The etching method according to claim 3, wherein in the etching step, etching is performed with a plasma gas made from the etching gas.

### Claim 9 (depends on 2)

A method of manufacturing a semiconductor, comprising performing etching by the etching method as claimed in claim 2.

### Claim 10 (depends on 3)

A method of manufacturing a semiconductor, comprising performing etching by the etching method as claimed in claim 3.

### Claim 11 (depends on 4)

A method of manufacturing a semiconductor, comprising performing etching by the etching method as claimed in claim 4.