Read spike mitigation in integrated circuit memory
AssigneeMicron Technology, Inc.
InventorsJosephine Tiu Hamada, Kenneth Richard Surdyk, Lingming Yang, Mingdong Cui
Life of this patent
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Abstract
An integrated circuit memory device, having: a first wire; a second wire; a memory cell connected between the first wire and the second wire; a first voltage driver connected to the first wire; and a second voltage driver connected to the second wire. During an operation to read the memory cell, the second voltage driver is configured to start ramping up a voltage applied on the second wire after the first voltage driver starts ramping up and holding a voltage applied on the first wire.
Claims20
An integrated circuit memory device, comprising:
- a first wire;
- a second wire;
- a memory cell connected between the first wire and the second wire;
- a first voltage driver connected to the first wire;
- and
- a second voltage driver connected to the second wire;
- wherein during an operation to read the memory cell, the second voltage driver is configured to start ramping up a voltage applied on the second wire after the first voltage driver starts ramping up a voltage applied on the first wire;
- and
- wherein the voltage applied on the first wire is positive;
- and the voltage applied on the second wire is negative.
A method, comprising:
- ramping up, by a first voltage driver connected to a first wire in an integrated circuit memory device, a voltage applied on the first wire, wherein a memory cell in the integrated circuit memory device is connected between the first wire and a second wire, and wherein a second voltage driver is connected to the second wire;
- and
- after the first voltage driver starts ramping up the voltage applied on the first wire, starting ramping up by the second voltage driver a voltage applied on the second wire;
- wherein a time difference between the first voltage driver starting to ramp up the voltage on the first wire and the second voltage driver starts to ramp up the voltage on the second wire is a predetermined time interval.
A method, comprising:
- reading a memory cell connected between a first wire and a second wire in an integrated circuit memory device, including:
- ramping up, by a first voltage driver connected to the first wire, a voltage applied on the first wire;
- and
- ramping up, by a second voltage driver connected to the second wire, a voltage applied on the second wire after the first voltage driver starts the ramping up of the voltage applied on the first wire, wherein the voltage applied on the first wire is positive;
- and the voltage applied on the second wire is negative.
Dependencies are inferred from the claim text.