# US 11,114,154 B2 · Voltage retention techniques > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,114,154 B2 - Document ID: US11114154B2 - Status: Granted - Kind: B2 - Application number: 16/716,903 - Filed: 2019-12-17 - Published: 2021-06-17 - Granted: 2021-09-07 - Earliest claimed: 2019-12-17 - Assignees: Arm Limited - Applicants: Arm Limited - Inventors: Amit Chhabra; Shanuj Garg - Web page: https://patentgrep.com/patent/US11114154B2 ## CPC - G11C 7/04: with means for avoiding disturbances due to temperature effects - G11C 11/417: for memory cells of the field-effect type - G11C 5/147: {Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops (G11C5/141 takes precedence)} - G11C 11/40626: {Temperature related aspects of refresh operations} - G11C 11/419: Read-write [R-W] circuits - H03F 3/45183: {Long tailed pairs (H03F3/4521, H03F3/45237 take precedence)} - G11C 7/062: {Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs} - H03F 1/303: {using a switching device (H03F1/305, H03F3/005, H03F3/38 take precedence)} - H03F 2200/447: the amplifier being protected to temperature influence - H03F 2203/45508: the CSC comprising a voltage generating circuit as bias circuit for the CSC - G11C: STATIC STORES (semiconductor memory devices H10B) - H03F: AMPLIFIERS ## Abstract Various implementations described herein are directed to a device having voltage generator circuitry that provides a temperature-compensated voltage. The device may include amplifier circuitry that receives the temperature-compensated voltage from the voltage generator circuitry and provides an output voltage based on the temperature-compensated voltage. The device may include voltage retention circuitry that receives the output voltage from the amplifier circuitry and provides a retention voltage to memory based on the output voltage. ## Claims ### Claim 1 A device, comprising: voltage generator circuitry comprising a chain of devices that provide a reference voltage and a temperature-compensated voltage, wherein a chain of fixed length devices of the chain of devices is arranged and configured to provide the reference voltage; amplifier circuitry that receives the temperature-compensated voltage and the reference voltage from the voltage generator circuitry and provides an output voltage based on the temperature-compensated voltage and the reference voltage; and voltage retention circuitry that receives the output voltage from the amplifier circuitry and provides a retention voltage to memory based on the output voltage. ### Claim 2 (depends on 1) The device of claim 1, wherein the memory refers to static random access memory (SRAM) having an array of SRAM bitcells. ### Claim 3 (depends on 1) The device of claim 1, wherein: the chain of fixed length devices is configured to provide a tail voltage, and the amplifier circuitry receives the tail voltage from the chain of fixed length devices and provides the output voltage based on the temperature-compensated voltage, the reference voltage, and the tail voltage. ### Claim 4 (depends on 3) The device of claim 3, wherein the amplifier circuitry refers to a differential amplifier having multiple devices including a first device enabled by the temperature-compensated voltage, a second device enabled by the reference voltage, and a third device enabled by the tail voltage. ### Claim 5 (depends on 4) The device of claim 4, wherein the first device, the second device, and the third device are arranged and configured to provide the output voltage when enabled by the temperature-compensated voltage, the reference voltage, and the tail voltage. ### Claim 6 A device, comprising: voltage generator circuitry comprising a chain of devices that provides a temperature-compensated voltage; amplifier circuitry that receives the temperature-compensated voltage from the voltage generator circuitry and provides an output voltage based on the temperature-compensated voltage; and voltage retention circuitry that receives the output voltage from the amplifier circuitry and provides a retention voltage to memory based on the output voltage, wherein the chain of devices of the voltage generator circuitry comprises a chain of variable length devices that is arranged and configured to provide the temperature-compensated voltage. ### Claim 7 (depends on 6) The device of claim 6, wherein the chain of variable length devices has variable width that tapers from a greater width device to a lessor width device with a number of intermediate width devices coupled between the greater width device and the lessor width device. ### Claim 8 (depends on 6) The device of claim 6, wherein the temperature-compensated voltage provided by the chain of variable length devices refers to a proportional to absolute temperature (PTAT) voltage. ### Claim 9 A device, comprising: voltage generator circuitry that provides a temperature-compensated voltage; amplifier circuitry that receives the temperature-compensated voltage from the voltage generator circuitry and provides an output voltage based on the temperature-compensated voltage; and voltage retention circuitry that receives the output voltage from the amplifier circuitry and provides a retention voltage to memory based on the output voltage, wherein the voltage retention circuitry has multiple devices including a switch device enabled by the output voltage and provides the retention voltage to the memory based on the output voltage. ### Claim 10 A system, comprising: a first voltage generator comprising a chain of fixed length devices that is configured to provide one or more reference voltages; a second voltage generator comprising a chain of devices that provide a temperature-compensated voltage; one or more amplifier stages that receive the one or more reference voltages from the first voltage generator, receive the temperature-compensated voltage from the second voltage generator, and provide one or more output voltages based on the one or more reference voltages and the temperature-compensated voltage; and one or more voltage retention stages that receive the one or more output voltages from the one or more amplifier stages and provide a retention voltage to memory based on the one or more output voltages. ### Claim 11 (depends on 10) The system of claim 10, wherein: the first voltage generator is configured to provide the one or more reference voltages and a tail voltage, and the one or more amplifier stages receive the one or more reference voltages from the chain of fixed length devices and provide the one or more output voltages based on the temperature-compensated voltage, the one or more reference voltages, and the tail voltage. ### Claim 12 (depends on 11) The system of claim 11, wherein the one or more amplifier stages refer to one or more differential amplifiers having multiple devices including first devices enabled by the temperature-compensated voltage, second devices enabled by the one or more reference voltages, and third devices enabled by the tail voltage. ### Claim 13 (depends on 12) The system of claim 12, wherein the first devices, the second devices, and the third devices are arranged and configured to provide the one or more output voltages when enabled by the temperature-compensated voltage, the one or more reference voltages, and the tail voltage. ### Claim 14 (depends on 10) The system of claim 10, wherein the one or more voltage retention stages have multiple devices including switch devices enabled by the one or more output voltages and provide the retention voltage to the memory based on the one or more output voltages. ### Claim 15 (depends on 10) The system of claim 10, wherein the memory refers to static random access memory (SRAM) having an array of SRAM bitcells. ### Claim 16 A system, comprising: a first voltage generator that provides one or more reference voltages; a second voltage generator comprising a chain of devices that provides a temperature-compensated voltage; one or more amplifier stages that receive the one or more reference voltages from the first voltage generator, receive the temperature-compensated voltage from the second voltage generator, and provide one or more output voltages based on the one or more reference voltages and the temperature-compensated voltage; and one or more voltage retention stages that receive the one or more output voltages from the one or more amplifier stages and provide a retention voltage to memory based on the one or more output voltages, wherein the chain of devices of the second voltage generator comprises a chain of variable length devices configured to provide the temperature-compensated voltage. ### Claim 17 (depends on 16) The system of claim 16, wherein the temperature-compensated voltage provided by the chain of variable length devices refers to a proportional to absolute temperature (PTAT) voltage. ### Claim 18 A method of manufacturing an integrated circuit, comprising: fabricating a first voltage generator that provides a reference voltage; fabricating a second voltage generator comprising a chain of variable length devices that provide a temperature-compensated voltage for memory retention; fabricating an amplifier stage that receives the reference voltage from the first voltage generator, receives the temperature-compensated voltage from the second voltage generator, and provides an output voltage based on the reference voltage and the temperature-compensated voltage; and fabricating a retention stage that receives the output voltage from the amplifier stage and provides a retention voltage to memory based on the output voltage. ### Claim 19 (depends on 18) The method of claim 18, wherein: the first voltage generator has a chain of fixed length devices configured to provide the reference voltage, the temperature-compensated voltage provided by the chain of variable length devices refers to a proportional to absolute temperature (PTAT) voltage; and the memory refers to static random access memory (SRAM) having an array of SRAM bitcells.