Data structures with multiple read ports

A method for reading data from a memory through multiple read ports, comprising:

• receiving, at a first arithmetic logic unit (ALU) and a second ALU, input data to be processed by the first and second ALUs;
• generating, by the first and second ALUs, respective first and second read requests based upon the received input data for retrieving data from a memory structure, the memory structure comprising at least:
• a first sub-structure storing a first subset of data;
• a second sub-structure storing a second subset of data;
• a third sub-structure storing difference data corresponding to the first subset of data and the second subset of data, and wherein the first, second, and third memory sub-structures each have one read port;
• an access circuit connected to the first, second, and third sub-structures for controlling access to the first, second, and third sub-structures by at least a first mapped read port and a second mapped read port, comprising:
• a first difference calculation circuit connected to the first mapped read port and configured to reconstruct portions of data from the second sub-structure data using corresponding portions of first sub-structure data and third sub-structure data, and
• a second difference calculation circuit connected to the second mapped read port and configured to reconstruct portions of data from the first sub-structure using corresponding portions of second sub-structure data and third sub-structure data;
• during a first time period, transmitting the first and second read requests to the access circuit of the memory structure via the first mapped read port and the second mapped read port, respectively;
• at the access circuit, in response to a determination that both the first read request and the second read request request data from the second subset of data, providing to the second ALU through the second mapped read port the data requested by the second read request from the second subset of data stored on the second sub-structure, and providing to the first ALU through the first mapped read port data requested by the first read request by using the first difference circuit connected to the first mapped read port to reconstruct a requested portion of the second subset of data using the first subset of data stored on the first sub-structure and the difference data stored on the third sub-structure.

A memory configured to allow for concurrent read requests of a data structure from each of up to 2 m output read ports, where m is an integer greater than 1, comprising:

• a plurality of memory structures, each having a respective set of 2m−1 read ports wherein any of the subset of data stored by the respective structure can be read concurrently through the respective 2m−1 read ports of the structure in parallel, wherein the plurality of memory structures comprises a first set of memory structures each storing at least a respective subset of the data structure and a difference memory structure storing difference data corresponding to data of a first structure of the first set of memory structures and a remaining structure of the first set of memory structures;
• and
• a set of up to 2m−1 access circuits, each connected to a respective read port of the 2m−1 read ports of each of the first structure, remaining structure and the difference memory structure and having respective first and second output read ports of the up to 2 m output read ports, and configured to satisfy concurrent read requests for data from the first structure from both the first and second output read ports by passing data from the first structure to the first output read port and concurrently passing data reconstructed data using the difference memory structure and the remaining structure to the second output read port.