Circuit, system, and method for reading memory-based digital identification devices in parallel

A method for simultaneously reading a plurality of readable memory-based digital identification devices, comprising:

• providing a host microcontroller;
• and
• providing a plurality of readable memory-based digital identification devices electrically coupled to the host microcontroller in a parallel configuration;
• wherein the host microcontroller is configured to assert a read prompt to each of the plurality of the plurality of readable memory-based digital identification devices during a same clock cycle;
• wherein each of the plurality of readable memory-based digital identification devices is configured to send a response to the host microcontroller simultaneously in a same clock cycle;
• and
• wherein the host microcontroller is configured to capture corresponding bits of identification data from each of the plurality of readable memory-based digital identification devices simultaneously in a same clock cycle via a parallel port read, such that all bits received from the plurality of readable memory-based digital identification devices in a given clock cycle are read before a next bit is received by the host microcontroller.