# US 11,114,058 B2 · Method of V-By-One (VBO) signal processing for saving hardware resources, device, and terminal thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 11,114,058 B2 - Document ID: US11114058B2 - Status: Granted - Kind: B2 - Application number: 16/646,141 - Filed: 2020-03-06 - Published: 2021-07-01 - Granted: 2021-09-07 - Earliest claimed: 2019-12-30 - Assignees: Tcl China Star Optoelectronics Technology Co., Ltd. - Applicants: Tcl China Star Optoelectronics Technology Co., Ltd. - Inventors: Guangxing Xiao - Web page: https://patentgrep.com/patent/US11114058B2 ## CPC - G09G 5/008: {Clock recovery} - G09G 3/2096: {Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167)} - G09G 3/36: using liquid crystals - G09G 5/006: {Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04)} - G09G 5/024: {using colour registers, e.g. to control background, foreground, surface filling (G09G5/06 takes precedence)} - G09G 5/397: Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay (G09G5/02 takes precedence) - G09G 5/399: using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers - G09G 2350/00: Solving problems of bandwidth in display systems - G09G 2360/18: Use of a frame buffer in a display terminal, inclusive of the display panel - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A method of V-By-One (VBO) signal processing for saving hardware resources, and a device and terminal thereof are provided. The method includes steps of: obtaining a plurality of VBO signals transmitted through data lanes respectively and having a same descrambling reset flag; resolving each of the VBO signals to obtain a valid data strobe signal; selecting one valid data strobe signal as a synchronization strobe signal and performing time-delay processing to obtain a delay strobe signal; and writing signals alternately into a first register and a second register under control of the synchronization strobe signal and reading signals alternately from the second register and the first register under control of the delay strobe signal based on the same descrambling reset flag. ## Claims ### Claim 1 A method of V-By-One (VBO) signal processing for saving hardware resources, comprising steps of: obtaining a plurality of VBO signals transmitted through data lanes respectively and having a same descrambling reset flag; processing and resolving each of the VBO signals to obtain a data signal and a control signal of each of the VBO signals, wherein the control signal comprises a valid data strobe signal; selecting one control signal from all of the control signals as a synchronization signal, and using the valid data strobe signal comprised in the synchronization signal as a synchronization strobe signal; obtaining a delay strobe signal by performing time-delay processing on the synchronization strobe signal, in which a duration of delay is one or more VBO signal receiving clocks; writing the data signal and the control signal alternately into a first register and a second register under control of the synchronization strobe signal based on the same descrambling reset flag that all of the VBO signals have, in which the first register and the second register operate synchronously; and reading the data signal and the control signal alternately from the second register and the first register under control of the delay strobe signal based on the same descrambling reset flag that all of the VBO signals have. ### Claim 2 (depends on 1) The method as claimed in claim 1, wherein processing and resolving each of the VBO signals comprises steps of: converting an obtained serial VBO signal into a parallel VBO signal; decoding the parallel VBO signal into an identifiable signal; descrambling the identifiable signal; and unpacking the descrambled identifiable signal to obtain the data signal and control signal of each of the VBO signals. ### Claim 3 (depends on 1) The method as claimed in claim 1, wherein a signal receiving clock is taken as a working clock in writing the data signal and the control signal alternately into the first register and the second register. ### Claim 4 (depends on 1) The method as claimed in claim 1, wherein a system clock is taken as a working clock in reading the data signal and the control signal alternately from the second register and the first register. ### Claim 5 (depends on 1) The method as claimed in claim 1, wherein in the step of processing and resolving each of the VBO signals, the control signal further comprises a field synchronization signal and a row synchronization signal.