Memory migration in hybrid emulation
AssigneeSynopsys, Inc.
InventorsAshutosh Varma, Cédric Marie Frédéric René Babled
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Abstract
A hybrid emulation system and method for hybrid emulation of a design under test (DUT). The DUT has system memory logically segmented into a plurality of memory blocks. The hybrid emulation system comprises a hardware emulation system to emulate a first portion of the DUT during the hybrid emulation. The hybrid emulation system also comprises a simulation system to simulate a second portion of the DUT during the hybrid emulation. At least one of the hardware emulation system or the simulation system is configured to assign a memory block of the plurality of memory blocks to one of the hardware emulation system or the simulation system based on memory access statistics describing accesses to the memory block during the hybrid emulation.
Claims20
A hybrid emulation system for hybrid emulation of a design under test (DUT) having system memory logically segmented into a plurality of memory blocks, the system comprising:
- a hardware emulation system to emulate a first portion of the DUT during the hybrid emulation;
- and a simulation system to simulate a second portion of the DUT during the hybrid emulation,
- wherein at least one of the hardware emulation system or the simulation system is configured to:
- assign a first set of the plurality of memory blocks to a first owning system, wherein the first owning system is the simulation system or the emulation system;
- assign a second set of the plurality of memory blocks to a second owning system, wherein the second owning system is the hardware emulation system or the simulation system,
- wherein in response to the second owning system being the simulation system, direct memory access (DMA) to the second set of memory blocks is disabled for the emulated first portion of the DUT,
- wherein in response to the second owning system being the emulation system, direct memory interface (DMI) to the second set of memory blocks is disabled for the simulated second portion of the DUT;
- and
- re-assign, during hybrid emulation, a memory block of the first set of memory blocks to a requesting system based on memory access statistics describing access to the memory block during hybrid emulation.
A method for hybrid emulation of a design under test (DUT) having system memory logically segmented into a plurality of memory blocks, the method comprising:
- emulating a first portion of the DUT in an emulation system during the hybrid emulation;
- simulating a second portion of the DUT in a simulation system during the hybrid emulation;
- assigning a first set of the plurality of memory blocks to a first owning system, wherein the first owning system is the simulation system or the emulation system;
- assigning a second set of the plurality of memory blocks to a second owning system, wherein the second owning system is the hardware emulation system or the simulation system,
- wherein in response to the second owning system being the simulation system, direct memory access (DMA) to the second set of memory blocks is disabled for the emulated first portion of the DUT,
- wherein in response to the second owning system being the emulation system, direct memory interface (DMI) to the second set of memory blocks is disabled for the simulated second portion of the DUT;
- and
- re-assigning, during hybrid emulation, a memory block of the first set of memory blocks to a second requesting system based on memory access statistics describing access to the memory block during hybrid emulation.
A non-transitory computer readable medium comprising stored instructions, which when executed by one or more processors associated with a hybrid emulation system for hybrid emulation of a design under test (DUT), cause the one or more processors to:
- emulate a first portion of the DUT during the hybrid emulation;
- a simulation system to simulate a second portion of the DUT during the hybrid emulation;
- wherein at least one of the hardware emulation system or the simulation system is configured to:
- assign a first set of the plurality of memory blocks to a first owning system, wherein the first owning system is the simulation system or the emulation system;
- assign a second set of the plurality of memory blocks to a second owning system, wherein the second owning system is the hardware emulation system or the simulation system,
- wherein in response to the second owning system being the simulation system, direct memory access (DMA) to the second set of memory blocks is disabled for the emulated first portion of the DUT,
- wherein in response to the second owning system being the emulation system, direct memory interface (DMI) to the second set of memory blocks is disabled for the simulated second portion of the DUT;
- and
- re-assign, during hybrid emulation, a memory block of the first set of memory blocks to a second requesting system based on memory access statistics describing access to the memory block during hybrid emulation.
Dependencies are inferred from the claim text.