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US 11,113,205 B2Granted
Die addressing using a reduced size translation table entry
AssigneeMicron Technology, Inc.
InventorJonathan M. Haswell
Life of this patent
Estimating the term…
Abstract
An example apparatus for die addressing can include an array of memory cells and a memory cache. The memory cache can be configured to store at least a portion of an address mapping table. The address mapping table can include entries that map translation units (TUs) to physical locations in the array. The entries can include data that indicate a location within the array that stores a particular TU without including data that indicates which die of the array the TU is stored in.
Claims23
An apparatus, comprising:
- an array of memory cells comprising a plurality of dies;
- and
- a memory cache configured to store at least a portion of an address mapping table, wherein:
- the address mapping table comprises entries that map translation units (TUs) to physical locations in the array, and
- the entries comprise data that indicate a location within the array that stores a particular TU without including data that indicates which die of the plurality of dies of the array the TU is stored in;
- and
- a controller configured to:
- write TUs across a block stripe that includes a respective block of each of the plurality of dies, wherein:
- each of the TUs are only written to a single die of the plurality of dies;
- a write cursor indicates which respective block stripe of which respective die each of the TUs are to be written to;
- and
- a sub-write cursor indicates which location within the respective block stripe of the respective die to write each respective TU;
- and
- write the particular TU to a respective block of a die in the block stripe, wherein the particular TU is not written to the other dies in the block stripe.
11 more elements
A method, comprising:
- determining which particular portion of an array of memory cells to write a translation unit (TU) using a corresponding entry in an address mapping table;
- determining which particular die of a plurality of dies in the portion of the array to write the TU to without accessing the corresponding entry in the address mapping table;
- and
- writing:
- TUs across a block stripe that includes a respective block of each of the plurality of dies, wherein:
- each of the TUs are only written to a single die of the plurality of dies;
- a write cursor indicates which respective block stripe of which respective die each of the TUs are to be written to;
- and
- a sub-write cursor indicates which location within the respective block stripe of the respective die to write each respective TU;
- and
- the particular TU to a respective block of a die in the block stripe, wherein the particular TU is not written to the other dies in the block stripe.
8 more elements
An apparatus, comprising:
- an array of memory cells comprising a plurality of dies;
- and
- a memory cache configured to store at least a portion of an address mapping table, wherein:
- the address mapping table comprises entries that map translation units (TUs) to physical locations in the array, wherein at least one of the TUs is mapped to both a first page of a particular die of the plurality of dies and a second page of the particular die, and
- the entries comprise data that indicate a location within the array that stores a particular TU;
- and
- a controller configured to:
- use a hash function associated with each of the TUs to determine which of the TUs is written to which of the plurality of dies of the array;
- write TUs across a block stripe that includes a respective block of each of the plurality of dies, wherein:
- each of the TUs are only written to a single die of the plurality of dies;
- a write cursor indicates which respective block stripe of which respective die each of the TUs are to be written to;
- a sub-write cursor indicates which location within the respective block stripe of the respective die to write each respective TU;
- and
- each of the TUs are written to their respective single die without reference to a last page written on a previous die;
- and
- write the particular TU to a respective block of a die in the block stripe, wherein the particular TU is not written to the other dies in the block stripe.
13 more elements
An apparatus, comprising:
- an array of memory cells comprising:
- a plurality of dies of memory, the plurality of dies each comprising a number of planes, the number of planes each comprising a number of blocks, the number of blocks each comprising a number of pages;
- a controller coupled to the array, wherein the controller is configured to:
- determine, using a hash function, which die of the plurality of dies to write each respective translation unit (TU) of a plurality of TUs to, wherein using the hash function randomizes which die is chosen to write each respective TU of the plurality of TUs to and reduces wear on any particular die of the plurality of dies;
- write TUs across a block stripe that includes a respective block of each of the plurality of dies;
- write each of the TUs to a respective block of a die in the block stripe, wherein
- each of the TUs are only written to a single die of the plurality of dies and each of the TUs do not span more than the single die;
- each of the TUs are not written to other respective dies in the block stripe;
- a write cursor indicates which respective block stripe of which respective die each of the TUs are to be written to;
- a sub-write cursor indicates which location within the respective block stripe of the respective die to write each respective TU;
- and
- each of the TUs are written to their respective single die without reference to a last page written on a previous die;
- determine, using the hash function, that each of the TUs are located in their respective die;
- and
- read each of the TUs from their respective die.
12 more elements
Dependencies are inferred from the claim text.